comment out duplicate (bypass) put_z stage for now
[ieee754fpu.git] / src / add / nmigen_add_experiment.py
index 1c6ba120f76f7c59b118c24f6c59b3e97c83a1ba..85312204cf1a60ed9dcd03e9fde14d52ec8aa2e0 100644 (file)
@@ -1720,8 +1720,8 @@ class FPADDBaseMod:
         ppz = self.add_state(FPPutZ("pack_put_z", n1.out_z.z, self.o,
                                     n1.out_z.mid, self.o.mid))
 
-        pz = self.add_state(FPPutZ("put_z", sc.out_z.z, self.o,
-                                    sc.o.mid, self.o.mid))
+        #pz = self.add_state(FPPutZ("put_z", sc.out_z.z, self.o,
+        #                            sc.o.mid, self.o.mid))
 
 
 class FPADDBase(FPState):