convert to more general base classes, start support for FP64

[ieee754fpu.git] / src / add / nmigen_add_experiment.py

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index ddd7ad07710994aff1dacaf77e2fddb7e43010c1..efb0c8bfa1de2bd8526d213e8426f934841f112a 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -26,7 +26,7 @@ class FPADD(FPBase):
         # Latches
         a = FPNum(self.width)
         b = FPNum(self.width)
-        z = FPNum(self.width, 24)
+        z = FPNum(self.width, False)
 
         tot = Signal(28)     # sticky/round/guard bits, 23 result, 1 overflow