convert to more general base classes, start support for FP64

[ieee754fpu.git] / src / add / nmigen_div_experiment.py

diff --git a/src/add/nmigen_div_experiment.py b/src/add/nmigen_div_experiment.py
index 1cbabd9ed03e925964cba15882726a186718ef79..918713a0bbd94d9d49a1bdd3db412df618b6ee12 100644 (file)
--- a/src/add/nmigen_div_experiment.py
+++ b/src/add/nmigen_div_experiment.py
@@ -42,9 +42,9 @@ class FPDIV(FPBase):
         m = Module()
 
         # Latches
-        a = FPNum(self.width, 24)
-        b = FPNum(self.width, 24)
-        z = FPNum(self.width, 24)
+        a = FPNum(self.width, False)
+        b = FPNum(self.width, False)
+        z = FPNum(self.width, False)
 
         div = Div(51)