add new Elaboratable

[ieee754fpu.git] / src / add / nmigen_div_experiment.py

diff --git a/src/add/nmigen_div_experiment.py b/src/add/nmigen_div_experiment.py
index 5dccecb50c350eeef5f1f9bc48922a43fcb0c0fb..94ebc2fd08eb0d8d36f3922d46c1f05d5479fee4 100644 (file)
--- a/src/add/nmigen_div_experiment.py
+++ b/src/add/nmigen_div_experiment.py
@@ -43,7 +43,7 @@ class FPDIV(FPBase):
         self.states.append(state)
         return state
 
-    def get_fragment(self, platform=None):
+    def elaborate(self, platform=None):
         """ creates the HDL code-fragment for FPDiv
         """
         m = Module()