woo! got FPADD pipeline to work

[ieee754fpu.git] / src / add / test_fpadd_pipe.py

diff --git a/src/add/test_fpadd_pipe.py b/src/add/test_fpadd_pipe.py
index 32bf072d09b9517307ede1bdce6eaa2b35aee9b6..4bac9279b5512366eb51dcfafb9ff661f34c5207 100644 (file)
--- a/src/add/test_fpadd_pipe.py
+++ b/src/add/test_fpadd_pipe.py
@@ -20,7 +20,7 @@ class InputTest:
         self.dut = dut
         self.di = {}
         self.do = {}
-        self.tlen = 4
+        self.tlen = 10
         self.width = 32
         for mid in range(dut.num_rows):
             self.di[mid] = {}
@@ -28,6 +28,8 @@ class InputTest:
             for i in range(self.tlen):
                 op1 = randint(0, (1<<self.width)-1)
                 op2 = randint(0, (1<<self.width)-1)
+                #op1 = 0x40900000
+                #op2 = 0x40200000
                 res = Float32(op1) + Float32(op2)
                 self.di[mid][i] = (op1, op2)
                 self.do[mid].append(res.bits)