import unittest
from bigint_presentation_code.compiler_ir2 import (GPR_SIZE_IN_BYTES, Fn,
- OpKind, PreRASimState,
+ FnAnalysis, OpKind, OpStage,
+ PreRASimState, ProgramPoint,
SSAVal)
class TestCompilerIR(unittest.TestCase):
maxDiff = None
+ def test_program_point(self):
+ # type: () -> None
+ expected = [] # type: list[ProgramPoint]
+ for op_index in range(5):
+ for stage in OpStage:
+ expected.append(ProgramPoint(op_index=op_index, stage=stage))
+
+ for idx, pp in enumerate(expected):
+ if idx + 1 < len(expected):
+ self.assertEqual(pp.next(), expected[idx + 1])
+
+ self.assertEqual(sorted(expected), expected)
+
def make_add_fn(self):
# type: () -> tuple[Fn, SSAVal]
fn = Fn()
op5 = fn.append_new_op(
OpKind.SvAddE, input_vals=[a, b, ca, vl], maxvl=MAXVL, name="add")
s = op5.outputs[0]
- fn.append_new_op(OpKind.SvStd, input_vals=[s, arg, vl],
- immediates=[0], maxvl=MAXVL, name="st")
+ _ = fn.append_new_op(OpKind.SvStd, input_vals=[s, arg, vl],
+ immediates=[0], maxvl=MAXVL, name="st")
return fn, arg
+ def test_fn_analysis(self):
+ fn, _arg = self.make_add_fn()
+ fn_analysis = FnAnalysis(fn)
+ print(repr(fn_analysis))
+ self.assertEqual(
+ repr(fn_analysis),
+ "FnAnalysis(fn=<Fn>, uses=FMap({"
+ "<arg.outputs[0]: <I64>>: OFSet(["
+ "<ld.input_uses[0]: <I64>>, <st.input_uses[1]: <I64>>]), "
+ "<vl.outputs[0]: <VL_MAXVL>>: OFSet(["
+ "<ld.input_uses[1]: <VL_MAXVL>>, <li.input_uses[0]: <VL_MAXVL>>, "
+ "<add.input_uses[3]: <VL_MAXVL>>, "
+ "<st.input_uses[2]: <VL_MAXVL>>]), "
+ "<ld.outputs[0]: <I64*32>>: OFSet(["
+ "<add.input_uses[0]: <I64*32>>]), "
+ "<li.outputs[0]: <I64*32>>: OFSet(["
+ "<add.input_uses[1]: <I64*32>>]), "
+ "<ca.outputs[0]: <CA>>: OFSet([<add.input_uses[2]: <CA>>]), "
+ "<add.outputs[0]: <I64*32>>: OFSet(["
+ "<st.input_uses[0]: <I64*32>>]), "
+ "<add.outputs[1]: <CA>>: OFSet()}), "
+ "op_indexes=FMap({"
+ "Op(kind=OpKind.FuncArgR3, input_vals=[], input_uses=(), "
+ "immediates=[], outputs=(<arg.outputs[0]: <I64>>,), "
+ "name='arg'): 0, "
+ "Op(kind=OpKind.SetVLI, input_vals=[], input_uses=(), "
+ "immediates=[32], outputs=(<vl.outputs[0]: <VL_MAXVL>>,), "
+ "name='vl'): 1, "
+ "Op(kind=OpKind.SvLd, input_vals=["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>], "
+ "input_uses=(<ld.input_uses[0]: <I64>>, "
+ "<ld.input_uses[1]: <VL_MAXVL>>), immediates=[0], "
+ "outputs=(<ld.outputs[0]: <I64*32>>,), name='ld'): 2, "
+ "Op(kind=OpKind.SvLI, input_vals=[<vl.outputs[0]: <VL_MAXVL>>], "
+ "input_uses=(<li.input_uses[0]: <VL_MAXVL>>,), immediates=[0], "
+ "outputs=(<li.outputs[0]: <I64*32>>,), name='li'): 3, "
+ "Op(kind=OpKind.SetCA, input_vals=[], input_uses=(), "
+ "immediates=[], outputs=(<ca.outputs[0]: <CA>>,), name='ca'): 4, "
+ "Op(kind=OpKind.SvAddE, input_vals=["
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>, "
+ "<ca.outputs[0]: <CA>>, <vl.outputs[0]: <VL_MAXVL>>], "
+ "input_uses=(<add.input_uses[0]: <I64*32>>, "
+ "<add.input_uses[1]: <I64*32>>, <add.input_uses[2]: <CA>>, "
+ "<add.input_uses[3]: <VL_MAXVL>>), immediates=[], outputs=("
+ "<add.outputs[0]: <I64*32>>, <add.outputs[1]: <CA>>), "
+ "name='add'): 5, "
+ "Op(kind=OpKind.SvStd, input_vals=["
+ "<add.outputs[0]: <I64*32>>, <arg.outputs[0]: <I64>>, "
+ "<vl.outputs[0]: <VL_MAXVL>>], "
+ "input_uses=(<st.input_uses[0]: <I64*32>>, "
+ "<st.input_uses[1]: <I64>>, <st.input_uses[2]: <VL_MAXVL>>), "
+ "immediates=[0], outputs=(), name='st'): 6}), "
+ "live_ranges=FMap({"
+ "<arg.outputs[0]: <I64>>: <range:ops[0]:Early..ops[6]:Late>, "
+ "<vl.outputs[0]: <VL_MAXVL>>: <range:ops[1]:Late..ops[6]:Late>, "
+ "<ld.outputs[0]: <I64*32>>: <range:ops[2]:Early..ops[5]:Late>, "
+ "<li.outputs[0]: <I64*32>>: <range:ops[3]:Early..ops[5]:Late>, "
+ "<ca.outputs[0]: <CA>>: <range:ops[4]:Late..ops[5]:Late>, "
+ "<add.outputs[0]: <I64*32>>: <range:ops[5]:Early..ops[6]:Late>, "
+ "<add.outputs[1]: <CA>>: <range:ops[5]:Early..ops[6]:Early>}), "
+ "live_at=FMap({"
+ "<ops[0]:Early>: OFSet([<arg.outputs[0]: <I64>>]), "
+ "<ops[0]:Late>: OFSet([<arg.outputs[0]: <I64>>]), "
+ "<ops[1]:Early>: OFSet([<arg.outputs[0]: <I64>>]), "
+ "<ops[1]:Late>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>]), "
+ "<ops[2]:Early>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>]), "
+ "<ops[2]:Late>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>]), "
+ "<ops[3]:Early>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>]), "
+ "<ops[3]:Late>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>]), "
+ "<ops[4]:Early>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>]), "
+ "<ops[4]:Late>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>, "
+ "<ca.outputs[0]: <CA>>]), "
+ "<ops[5]:Early>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<ld.outputs[0]: <I64*32>>, <li.outputs[0]: <I64*32>>, "
+ "<ca.outputs[0]: <CA>>, <add.outputs[0]: <I64*32>>, "
+ "<add.outputs[1]: <CA>>]), "
+ "<ops[5]:Late>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<add.outputs[0]: <I64*32>>, <add.outputs[1]: <CA>>]), "
+ "<ops[6]:Early>: OFSet(["
+ "<arg.outputs[0]: <I64>>, <vl.outputs[0]: <VL_MAXVL>>, "
+ "<add.outputs[0]: <I64*32>>]), "
+ "<ops[6]:Late>: OFSet()}), "
+ "def_program_ranges=FMap({"
+ "<arg.outputs[0]: <I64>>: <range:ops[0]:Early..ops[1]:Early>, "
+ "<vl.outputs[0]: <VL_MAXVL>>: <range:ops[1]:Late..ops[2]:Early>, "
+ "<ld.outputs[0]: <I64*32>>: <range:ops[2]:Early..ops[3]:Early>, "
+ "<li.outputs[0]: <I64*32>>: <range:ops[3]:Early..ops[4]:Early>, "
+ "<ca.outputs[0]: <CA>>: <range:ops[4]:Late..ops[5]:Early>, "
+ "<add.outputs[0]: <I64*32>>: <range:ops[5]:Early..ops[6]:Early>, "
+ "<add.outputs[1]: <CA>>: <range:ops[5]:Early..ops[6]:Early>}), "
+ "use_program_points=FMap({"
+ "<ld.input_uses[0]: <I64>>: <ops[2]:Early>, "
+ "<ld.input_uses[1]: <VL_MAXVL>>: <ops[2]:Early>, "
+ "<li.input_uses[0]: <VL_MAXVL>>: <ops[3]:Early>, "
+ "<add.input_uses[0]: <I64*32>>: <ops[5]:Early>, "
+ "<add.input_uses[1]: <I64*32>>: <ops[5]:Early>, "
+ "<add.input_uses[2]: <CA>>: <ops[5]:Early>, "
+ "<add.input_uses[3]: <VL_MAXVL>>: <ops[5]:Early>, "
+ "<st.input_uses[0]: <I64*32>>: <ops[6]:Early>, "
+ "<st.input_uses[1]: <I64>>: <ops[6]:Early>, "
+ "<st.input_uses[2]: <VL_MAXVL>>: <ops[6]:Early>}), "
+ "all_program_points=<range:ops[0]:Early..ops[7]:Early>)")
+
def test_repr(self):
fn, _arg = self.make_add_fn()
self.assertEqual([repr(i) for i in fn.ops], [
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([3])}), ty=<I64>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=1)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SvLd, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=32)",
"OpProperties(kind=OpKind.SvLI, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=32)",
"OpProperties(kind=OpKind.SetCA, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SvAddE, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None)), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), maxvl=32)",
"OpProperties(kind=OpKind.SvStd, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=(), maxvl=32)",
])
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([3])}), ty=<I64>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=1)",
"OpProperties(kind=OpKind.CopyFromReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None),), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)]), "
"LocKind.StackI64: FBitSet(range(0, 1024))}), ty=<I64>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.CopyToReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)]), "
"LocKind.StackI64: FBitSet(range(0, 1024))}), ty=<I64>), "
- "tied_input_index=None, spread_index=None),), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SvLd, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=32)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyFromReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.SvLI, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), maxvl=32)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyFromReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.SetCA, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyToReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyToReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.SvAddE, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.CA: FBitSet([0])}), ty=<CA>), "
- "tied_input_index=None, spread_index=None)), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), maxvl=32)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyFromReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.SetVLI, "
"inputs=(), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.VecCopyToReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97)), "
"LocKind.StackI64: FBitSet(range(0, 993))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None),), maxvl=32)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=32)",
"OpProperties(kind=OpKind.CopyToReg, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)]), "
"LocKind.StackI64: FBitSet(range(0, 1024))}), ty=<I64>), "
- "tied_input_index=None, spread_index=None),), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early),), "
"outputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None),), maxvl=1)",
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Late),), maxvl=1)",
"OpProperties(kind=OpKind.SvStd, "
"inputs=("
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet(range(14, 97))}), ty=<I64*32>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.GPR: FBitSet([*range(3, 13), *range(14, 128)])}), "
"ty=<I64>), "
- "tied_input_index=None, spread_index=None), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early), "
"OperandDesc(loc_set_before_spread=LocSet(starts=FMap({"
"LocKind.VL_MAXVL: FBitSet([0])}), ty=<VL_MAXVL>), "
- "tied_input_index=None, spread_index=None)), "
+ "tied_input_index=None, spread_index=None, "
+ "write_stage=OpStage.Early)), "
"outputs=(), maxvl=32)",
])
if __name__ == "__main__":
- unittest.main()
+ _ = unittest.main()
projects / bigint-presentation-code.git / blobdiff