move test_buf_pipe.py unit test, shuffle nmutil

[ieee754fpu.git] / src / ieee754 / add / record_experiment.py

diff --git a/src/ieee754/add/record_experiment.py b/src/ieee754/add/record_experiment.py
index 1789c3bd8a6125819153921da42dcf9f6b87a14f..3d486c7d0b097e039b29985b9964db677490f9b7 100644 (file)
--- a/src/ieee754/add/record_experiment.py
+++ b/src/ieee754/add/record_experiment.py
@@ -3,7 +3,7 @@ from nmigen.hdl.rec import Record, Layout, DIR_NONE
 from nmigen.compat.sim import run_simulation
 from nmigen.cli import verilog, rtlil
 from nmigen.compat.fhdl.bitcontainer import value_bits_sign
-from singlepipe import cat, RecordObject
+from nmutil.singlepipe import cat, RecordObject
 
 
 class RecordTest: