switch pspec from dict to PipelineSpec

[ieee754fpu.git] / src / ieee754 / fpmul / specialcases.py

diff --git a/src/ieee754/fpmul/specialcases.py b/src/ieee754/fpmul/specialcases.py
index 43fc1810dfc17a28082634cd1a8327a422bd3ee8..68e75d150e91844a4359f9c300ca4c9f267d8f0e 100644 (file)
--- a/src/ieee754/fpmul/specialcases.py
+++ b/src/ieee754/fpmul/specialcases.py
@@ -45,7 +45,7 @@ class FPMulSpecialCasesMod(Elaboratable):
         #m.submodules.sc_out_z = self.o.z
 
         # decode: XXX really should move to separate stage
-        width = self.pspec['width']
+        width = self.pspec.width
         a1 = FPNumBaseRecord(width, False)
         b1 = FPNumBaseRecord(width, False)
         m.submodules.sc_decode_a = a1 = FPNumDecode(None, a1)