add addc* and subfc* instructions

[power-instruction-analyzer.git] / src / instr_models.rs

diff --git a/src/instr_models.rs b/src/instr_models.rs
index 1b56cad3c21172757dae91496cf2ff1afa9c3b34..e56e4fb1ffd117ce4c77405dee867c38af5dabd5 100644 (file)
--- a/src/instr_models.rs
+++ b/src/instr_models.rs
@@ -1,5 +1,5 @@
 use crate::{
-    ConditionRegister, InstructionInput, InstructionOutput, InstructionResult,
+    CarryFlags, ConditionRegister, InstructionInput, InstructionOutput, InstructionResult,
     MissingInstructionInput, OverflowFlags,
 };
 
@@ -85,6 +85,42 @@ pub fn subfo(inputs: InstructionInput) -> InstructionResult {
     })
 }
 
+create_instr_variants_ov_cr!(addc, addco, addc_, addco_, i64);
+
+pub fn addco(inputs: InstructionInput) -> InstructionResult {
+    let ra = inputs.try_get_ra()? as i64;
+    let rb = inputs.try_get_rb()? as i64;
+    let (result, ov) = ra.overflowing_add(rb);
+    let result = result as u64;
+    let ov32 = (ra as i32).overflowing_add(rb as i32).1;
+    let ca = (ra as u64).overflowing_add(rb as u64).1;
+    let ca32 = (ra as u32).overflowing_add(rb as u32).1;
+    Ok(InstructionOutput {
+        rt: Some(result),
+        overflow: Some(propagate_so(OverflowFlags { so: ov, ov, ov32 }, inputs)?),
+        carry: Some(CarryFlags { ca, ca32 }),
+        ..InstructionOutput::default()
+    })
+}
+
+create_instr_variants_ov_cr!(subfc, subfco, subfc_, subfco_, i64);
+
+pub fn subfco(inputs: InstructionInput) -> InstructionResult {
+    let ra = inputs.try_get_ra()? as i64;
+    let rb = inputs.try_get_rb()? as i64;
+    let (result, ov) = rb.overflowing_sub(ra);
+    let result = result as u64;
+    let ov32 = (rb as i32).overflowing_sub(ra as i32).1;
+    let ca = (rb as u64).overflowing_sub(ra as u64).1;
+    let ca32 = (rb as u32).overflowing_sub(ra as u32).1;
+    Ok(InstructionOutput {
+        rt: Some(result),
+        overflow: Some(propagate_so(OverflowFlags { so: ov, ov, ov32 }, inputs)?),
+        carry: Some(CarryFlags { ca, ca32 }),
+        ..InstructionOutput::default()
+    })
+}
+
 create_instr_variants_ov_cr!(divde, divdeo, divde_, divdeo_, i64);
 
 pub fn divdeo(inputs: InstructionInput) -> InstructionResult {