add parent_pspec everywhere

[soc.git] / src / soc / fu / div / test / test_pipe_ilang.py

diff --git a/src/soc/fu/div/test/test_pipe_ilang.py b/src/soc/fu/div/test/test_pipe_ilang.py
index a5b343910827a6f1ddebc43492b68b4fca4dd899..a9f0cb27cfe7cf091fb4410d8efeb85937af8519 100644 (file)
--- a/src/soc/fu/div/test/test_pipe_ilang.py
+++ b/src/soc/fu/div/test/test_pipe_ilang.py
@@ -6,7 +6,8 @@ from soc.fu.div.pipeline import DivBasePipe
 
 class TestPipeIlang(unittest.TestCase):
     def write_ilang(self, div_pipe_kind):
-        pspec = DivPipeSpec(id_wid=2, div_pipe_kind=div_pipe_kind)
+        pspec = DivPipeSpec(
+            id_wid=2, div_pipe_kind=div_pipe_kind, parent_pspec=None)
         alu = DivBasePipe(pspec)
         vl = rtlil.convert(alu, ports=alu.ports())
         with open(f"div_pipeline_{div_pipe_kind.name}.il", "w") as f: