X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=TLB%2Fsrc%2FCacheWalker.py;h=d0d33980845dd924ce96deb9ad24cae503471915;hb=e87da65b9ad32bb69ca8b6696b1cb9d5c5aeb0c6;hp=b075828eee5d02b8ebe651272f82c56ff1915451;hpb=1bdffffb489b274a69747ad7ed372a84b73d5f62;p=soc.git

diff --git a/TLB/src/CacheWalker.py b/TLB/src/CacheWalker.py
index b075828e..d0d33980 100644
--- a/TLB/src/CacheWalker.py
+++ b/TLB/src/CacheWalker.py
@@ -23,7 +23,7 @@ class CacheWalker():
         self.assoc = assoc # Assciativity of the cache
 
         self.read_port = mem.read_port
-        self.write_port = mem.write_port 
+        self.write_port = mem.write_port
 
         if (mem_size % assoc != 0):
             print("Cache Walker: Memory cannot be distributed between sets")