X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fadd%2Fnmigen_div_experiment.py;h=a7e215cb888817b750426af676a7825552dee431;hb=6bff1a997f3846872cf489c24b5c01426c4dc97c;hp=ff4c966828369c9a347ee34d49c3b040840e29b8;hpb=481d00c37b31e7908e624235e6e9c93b12baeebb;p=ieee754fpu.git

diff --git a/src/add/nmigen_div_experiment.py b/src/add/nmigen_div_experiment.py
index ff4c9668..a7e215cb 100644
--- a/src/add/nmigen_div_experiment.py
+++ b/src/add/nmigen_div_experiment.py
@@ -5,7 +5,8 @@
 from nmigen import Module, Signal, Const, Cat
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase
+from fpbase import FPNumIn, FPNumOut, FPOpIn, FPOpOut, Overflow, FPBase, FPState
+from singlepipe import eq
 
 class Div:
     def __init__(self, width):
@@ -32,11 +33,17 @@ class FPDIV(FPBase):
         FPBase.__init__(self)
         self.width = width
 
-        self.in_a  = FPOp(width)
-        self.in_b  = FPOp(width)
-        self.out_z = FPOp(width)
+        self.in_a  = FPOpIn(width)
+        self.in_b  = FPOpIn(width)
+        self.out_z = FPOpOut(width)
 
-    def get_fragment(self, platform=None):
+        self.states = []
+
+    def add_state(self, state):
+        self.states.append(state)
+        return state
+
+    def elaborate(self, platform=None):
         """ creates the HDL code-fragment for FPDiv
         """
         m = Module()
@@ -54,19 +61,24 @@ class FPDIV(FPBase):
         m.submodules.z = z
         m.submodules.of = of
 
+        m.d.comb += a.v.eq(self.in_a.v)
+        m.d.comb += b.v.eq(self.in_b.v)
+
         with m.FSM() as fsm:
 
             # ******
             # gets operand a
 
             with m.State("get_a"):
-                self.get_op(m, self.in_a, a, "get_b")
+                res = self.get_op(m, self.in_a, a, "get_b")
+                m.d.sync += eq([a, self.in_a.ready_o], res)
 
             # ******
             # gets operand b
 
             with m.State("get_b"):
-                self.get_op(m, self.in_b, b, "special_cases")
+                res = self.get_op(m, self.in_b, b, "special_cases")
+                m.d.sync += eq([b, self.in_b.ready_o], res)
 
             # ******
             # special cases: NaNs, infs, zeros, denormalised