X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fadd%2Fpipeline.py;h=afcee743982175e31a833a208067bf59ec2c3978;hb=6bff1a997f3846872cf489c24b5c01426c4dc97c;hp=9d3323df6a482514798176651f7d4b3becaa7d03;hpb=966fa44086c0ec66d1bee31322685d28a1eb82fe;p=ieee754fpu.git

diff --git a/src/add/pipeline.py b/src/add/pipeline.py
index 9d3323df..afcee743 100644
--- a/src/add/pipeline.py
+++ b/src/add/pipeline.py
@@ -8,7 +8,8 @@ from nmigen import tracer
 from nmigen.compat.fhdl.bitcontainer import value_bits_sign
 from contextlib import contextmanager
 
-from singlepipe import eq, StageCls, ControlBase, BufferedPipeline
+from nmoperator import eq
+from singlepipe import StageCls, ControlBase, BufferedHandshake
 from singlepipe import UnbufferedPipeline
 
 
@@ -130,20 +131,20 @@ class ObjectProxy:
         self._preg_map[name] = new_pipereg
         #object.__setattr__(self, name, new_pipereg)
         if self._pipemode:
-            print ("OP pipemode", self._syncmode, new_pipereg, value)
+            #print ("OP pipemode", self._syncmode, new_pipereg, value)
             assign = eq(new_pipereg, value)
             if self._syncmode:
                 self._m.d.sync += assign
             else:
                 self._m.d.comb += assign
         elif self._m:
-            print ("OP !pipemode assign", new_pipereg, value, type(value))
+            #print ("OP !pipemode assign", new_pipereg, value, type(value))
             self._m.d.comb += eq(new_pipereg, value)
         else:
-            print ("OP !pipemode !m", new_pipereg, value, type(value))
+            #print ("OP !pipemode !m", new_pipereg, value, type(value))
             self._assigns += eq(new_pipereg, value)
             if isinstance(value, ObjectProxy):
-                print ("OP, defer assigns:", value._assigns)
+                #print ("OP, defer assigns:", value._assigns)
                 self._assigns += value._assigns
                 self._eqs.append(value._eqs)
 
@@ -335,7 +336,7 @@ class PipeManager:
         for s in self.stages:
             print ("stage specs", s, s.inspecs, s.outspecs)
             if self.pipetype == 'buffered':
-                p = BufferedPipeline(s)
+                p = BufferedHandshake(s)
             else:
                 p = AutoPipe(s, s.assigns)
             pipes.append(p)