X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fadd%2Ftest_add16.py;h=f39ae8ae948c6a49d60686c1d3c01d2276f31122;hb=6bff1a997f3846872cf489c24b5c01426c4dc97c;hp=e45ce359b4cd5a08a8c1287c861c2f9f1827333b;hpb=9d56131f85e79434877858c4d4447151b6c54f4e;p=ieee754fpu.git

diff --git a/src/add/test_add16.py b/src/add/test_add16.py
index e45ce359..f39ae8ae 100644
--- a/src/add/test_add16.py
+++ b/src/add/test_add16.py
@@ -1,5 +1,3 @@
-from random import randint
-from random import seed
 from operator import add
 
 from nmigen import Module, Signal
@@ -13,24 +11,26 @@ from unit_test_half import (get_mantissa, get_exponent, get_sign, is_nan,
                                 run_edge_cases, run_corner_cases)
 
 def testbench(dut):
-    yield from check_case(dut, 0x7800, 0xff6f, 0xff6f)
-    yield from check_case(dut, 0x0000, 0x7c32, 0x7e32)
-    yield from check_case(dut, 0x0000, 0x7da9, 0x7fa9)
-    yield from check_case(dut, 0x0000, 0x7ea0, 0x7ea0)
-    yield from check_case(dut, 0x7c9a, 0x8000, 0x7e9a)
-    yield from check_case(dut, 0x7d5e, 0x0000, 0x7f5e)
-    yield from check_case(dut, 0x8000, 0x7c8c, 0x7e8c)
-    yield from check_case(dut, 0x8000, 0xfc55, 0xfe55)
-    yield from check_case(dut, 0x8000, 0x7e1a, 0x7e1a)
-    yield from check_case(dut, 0xfc00, 0x7c00, 0xfe00)
+    #yield from check_case(dut, 0x7800, 0xff6f, 0xff6f)
+    #yield from check_case(dut, 0x0000, 0x7c32, 0x7e32)
+    #yield from check_case(dut, 0x0000, 0x7da9, 0x7fa9)
+    #yield from check_case(dut, 0x0000, 0x7ea0, 0x7ea0)
+    #yield from check_case(dut, 0x7c9a, 0x8000, 0x7e9a)
+    #yield from check_case(dut, 0x7d5e, 0x0000, 0x7f5e)
+    #yield from check_case(dut, 0x8000, 0x7c8c, 0x7e8c)
+    #yield from check_case(dut, 0x8000, 0xfc55, 0xfe55)
+    #yield from check_case(dut, 0x8000, 0x7e1a, 0x7e1a)
+
+    #yield from check_case(dut, 0x8000, 0xfc01, 0x7e00)
+    yield from check_case(dut, 0xfc00, 0x7c00, 0x7e00)
     yield from check_case(dut, 0x8000, 0, 0)
     yield from check_case(dut, 0, 0, 0)
 
     count = 0
 
     #regression tests
-    stimulus_a = [ 0x8000 ]
-    stimulus_b = [ 0x0000 ]
+    stimulus_a = [ 0x8000, 0x8000 ]
+    stimulus_b = [ 0x0000, 0xfc01 ]
     yield from run_test(dut, stimulus_a, stimulus_b, add)
     count += len(stimulus_a)
     print (count, "vectors passed")