X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fieee754%2Ffpmul%2Ffmul.py;h=3ad9e53975c7d937d831e9f5f45218474ba47bfa;hb=f09f35af37956dc1e3cc01aadc84ad07a711d2d4;hp=abe6f613b75ca57882c16098ddce180eae4775cb;hpb=e71ebd7c7df6fed881f1a5cea15ae1d7b022cd28;p=ieee754fpu.git

diff --git a/src/ieee754/fpmul/fmul.py b/src/ieee754/fpmul/fmul.py
index abe6f613..3ad9e539 100644
--- a/src/ieee754/fpmul/fmul.py
+++ b/src/ieee754/fpmul/fmul.py
@@ -1,7 +1,7 @@
 from nmigen import Module, Signal, Cat, Mux, Array, Const
 from nmigen.cli import main, verilog
 
-from fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
+from ieee754.fpcommon.fpbase import FPNumIn, FPNumOut, FPOp, Overflow, FPBase, FPState
 from fpcommon.getop import FPGetOp
 from nmutil.singlepipe import eq