X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fmain%2Fscala%2Fdevices%2Fi2c%2FI2C.scala;h=7b9fad8897e28521702c017bb29a69e9067d7fde;hb=46aa6b0ac432431e013b25a24331f21457b025a8;hp=363d37b6eec33553f3e1f000cc535e19d90bfc96;hpb=baccd5ada2ab54381d9f4c75a3e3e72f39b2bcef;p=sifive-blocks.git

diff --git a/src/main/scala/devices/i2c/I2C.scala b/src/main/scala/devices/i2c/I2C.scala
index 363d37b..7b9fad8 100644
--- a/src/main/scala/devices/i2c/I2C.scala
+++ b/src/main/scala/devices/i2c/I2C.scala
@@ -535,6 +535,6 @@ trait HasI2CModuleContents extends Module with HasRegMap {
 
 // Magic TL2 Incantation to create a TL2 Slave
 class TLI2C(w: Int, c: I2CParams)(implicit p: Parameters)
-  extends TLRegisterRouter(c.address, interrupts = 1, beatBytes = w)(
+  extends TLRegisterRouter(c.address, "i2c", Seq("sifive,i2c0"), interrupts = 1, beatBytes = w)(
   new TLRegBundle(c, _)    with HasI2CBundleContents)(
   new TLRegModule(c, _, _) with HasI2CModuleContents)