X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=updates%2F021_2019dec29_nlnet_grants_approved.mdwn;h=bdb7a5e8199d5728d092af76ec381421babaa0e6;hb=HEAD;hp=9ad8028ba893136312391cae5b759b1e9d95a2d2;hpb=93eac6592c80712e4d41c403661844e2e83f10e0;p=crowdsupply.git diff --git a/updates/021_2019dec29_nlnet_grants_approved.mdwn b/updates/021_2019dec29_nlnet_grants_approved.mdwn index 9ad8028..bdb7a5e 100644 --- a/updates/021_2019dec29_nlnet_grants_approved.mdwn +++ b/updates/021_2019dec29_nlnet_grants_approved.mdwn @@ -3,11 +3,11 @@ applications were put in, and around EUR 200,000 to 250,000 of those have been approved. The RISC-V Foundation's continued extreme unethical actions have led us to consider using Power ISA. -### NLNet Grants +### NLnet Grants -[NLNet](http://nlnet.nl) were first approached eighteen months ago, with +[NLnet](http://nlnet.nl) were first approached eighteen months ago, with an initial application to develop the core of a privacy-respecting trustable -processor. Whilst NLNet's primary focus of the past fifteen years has been +processor. Whilst NLnet's primary focus of the past fifteen years has been software, they have funded reverse-engineering for [Osmocon BB](https://nlnet.nl/project/sdr-phy/) and for [OpenBSC](https://nlnet.nl/project/iuh-openbsc/) so are no strangers to @@ -25,21 +25,20 @@ expand on the core, to cover: * a Wishbone streaming enhancement to add A/V timecode stamps to Wishbone B4, and to develop independent libre-licensed peripherals as examples * two interrelated proposals to develop libre cell Libraries - ([Chips4Makers](http://chips4makers.be)), to be used by a team at + ([Chips4Makers](http://chips4makers.io/)), to be used by a team at [LIP6.fr](http://lip6.fr) using the Alliance / Coriolis2 ASIC layout tools; Additional funding will go to the nmigen team for ASIC improvements and special integration with Coriolis2 -The goal here is to get to a working, commercially viable 180 nm single-core -ASIC at around 300 to 350 MHz, suitable for use as a high-end embedded -controller. Staf from Chips4Makers will act as the "NDA firebreak" between -us and TSMC. -(side-note: Staf ran a -[Crowdsupply](https://www.crowdsupply.com/chips4makers/retro-uc) -campaign, and the NLNet funding will help him to realise that project and +The goal here is to get to a working, commercially viable 180 nm +single-core ASIC at around 300 to 350 MHz, suitable for use as a +high-end embedded controller. Staf from Chips4Makers will act as the +"NDA firebreak" between us and TSMC. (Side note: Staf ran a [Crowd +Supply campaign](https://www.crowdsupply.com/chips4makers/retro-uc), +and the NLnet funding will help him to realise that project and perhaps re-start a new campaign for the Retro-uC one day). -All of these have been approved by NLNet, and, crucially, the external +All of these have been approved by NLnet, and, crucially, the external independent review process successfully completed for each. The exact amounts of each grant is to be confirmed, with each being possible to be up to the limit of EUR 50,000 for each sub-project. @@ -56,14 +55,17 @@ and so on), these fields are so specialized that finding people who are good practical. Therefore, we made sure that the calculations were based around an approximate -EUR 3,000 per month budget per person, bearing in mind that due to NLNet's -international tax agreements, this being donations, that's equivalent to a +EUR 3,000 per month budget per person, bearing in mind that due to +international tax agreements +that apply to Charitable Organisations such as NLnet +(more information about this here, +this being donations, that's equivalent to a "wage" of approximately nearly twice that amount (three times if, as a business, you have to take into consideration corporation tax / employee insurance as well). We now need to find people willing to help do the work. What is -really nice is that NLNet will donate money to them for completion of that work! +really nice is that NLnet will donate money to them for completion of that work! Therefore, if you've always wanted to work on a 3D processor, its drivers and its source code, do get in touch. @@ -91,7 +93,7 @@ Michael puts it extremely well: I have absolutely no problem with the ISA itself, it's the abuse of power and the flagrant ignoring and abuse of basic tenets of trademark law that are just completely untenable. Not only that: one well-paid employee of SiFive has *repeatedly* engaged -in defamation attacks for over eighteen months, even raising a formal +in defamation attacks for over eighteen months. Even raising a formal complaint through the newly-established relationship with the Linux Foundation failed to keep that individual under control. Also adversely impacted was the newly-established Open Graphics Alliance initiative, @@ -117,13 +119,14 @@ Conference: in that short time, we covered: good and necessary thing. With this **formally** in place as part of an officially-approved Power ISA Standard, not only could our team expand the Power ISA in a safe and controlled fashion, so could other - adopters. + adopters of the Power ISA. * that the core OpenPower members had *already been discussing* how to make sure that new Libre teams with a commercial focus could join and not have any transparency / patent / NDA / royalty / licensing conflicts - of interest. The only major thing that the other members wanted was - a "public relations blackout period," right around the time of announcement of - new standards, which sounds perfectly reasonable to me. + of interest. The only major thing that the other members particularly + wanted was a "public relations blackout period," right around the time + of announcement of new standards, which sounds perfectly reasonable + to me. * that IBM will be providing a royalty-free unlimited license grant for *all* of its patents, as long as firstly the licensees do not make any effort to assert patents **against** IBM, and secondly, @@ -135,10 +138,11 @@ Conference: in that short time, we covered: * that the use of a certification mark - not a service mark or a trade mark - is the most appropriate thing for ISA standards. I mentioned this only briefly however it takes a lot more than 15 minutes to properly - explain, so I am not going to push it: Hugh is doing so much already. + explain, so I am not going to push it: Hugh is doing so much fantastic + work already. It was a very busy and positive conversation, where it is clear that -we caught them right at the beginning of the process. Consequently, +we caught them at just the right time in the process. Consequently, my discussion with Hugh was just at the right time. Without that, the existing OpenPower members might never have really truly believed that any Libre **commercial** project would ever in fact come forward @@ -153,7 +157,7 @@ controversial in it, and given his long-standing experience of several decades with the Libre and Open Communities, I cannot think of a reason why it would not be possible to sign it. We just have to see. -The timing here with NLNet is just on the edge: we have to create a +The timing here with NLnet is just on the edge: we have to create a full list of milestones and assign a fixed budget to each (then later subdivide them into sub-tasks under that milestone). This is a leeeetle bit challenging when we have not yet reviewed the OpenPower agreement, @@ -167,13 +171,13 @@ with a *userspace* RV64GC dual-ISA front-end. **Userspace** RISC-V POSIX PowerISA POSIX applications, however the **kernel** (supervisor) space will be entirely PowerISA. -The video and 3D acceleration opcodes will be **entirely in the Power ISA**. -We are sick and tired of the RISC-V Foundation's blatant mismanagement. -Therefore, we will comply to the absolute minimal letter with RV64GC for -the benefit of our users, backers, and sponsors. However, RISC-V and the -RISC-V ISA itself -will no longer receive the benefit of the advancements and innovation -that we have received funding and support to develop. +The video and 3D acceleration opcodes will be **entirely in the Power +ISA**. We are sick and tired of the RISC-V Foundation's intransigence +and blatant mismanagement. Therefore, we will comply to the absolute +minimal letter with RV64GC for the benefit of our users, backers, and +sponsors who will be expecting RISC-V Compliance. However, RISC-V and the +RISC-V ISA itself will no longer receive the benefit of the advancements +and innovation that we have received funding and support to develop. So, the assembly-code being written by hand for the video acceleration side, as well as the 3D drivers for Kazan and MESA, will "flip" from RV64GC