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(parent: cbe6869) | patch
x86: record register use for SIMD insns without respective explicit operands
authorJan Beulich <jbeulich@suse.com>
Tue, 16 Feb 2021 10:32:18 +0000 (11:32 +0100)
committerJan Beulich <jbeulich@suse.com>
Tue, 16 Feb 2021 10:32:18 +0000 (11:32 +0100)
commit014d61ea14540cc524a6f75d2b925e7bb1a6d289
tree82d2c225bcd0707d63e1cf64f52919c5f7a0cd7atree
parentcbe686965606262a9e4a3ca0e148d7812b368e7bcommit | diff
x86: record register use for SIMD insns without respective explicit operands

VZERO{ALL,UPPER} modify YMM registers despite having no operands.

While {,V}{LD,ST}MXCSR don't modify XMM registers, MXCSR and XMMn
collectively form underlying machine state.
gas/ChangeLog diff | blob | history
gas/config/tc-i386.c diff | blob | history
gas/testsuite/gas/i386/i386.exp diff | blob | history
gas/testsuite/gas/i386/property-ldmxcsr.d [new file with mode: 0644] blob
gas/testsuite/gas/i386/property-ldmxcsr.s [new file with mode: 0644] blob
gas/testsuite/gas/i386/property-vldmxcsr.d [new file with mode: 0644] blob
gas/testsuite/gas/i386/property-vldmxcsr.s [new file with mode: 0644] blob
gas/testsuite/gas/i386/property-vzeroall.d [new file with mode: 0644] blob
gas/testsuite/gas/i386/property-vzeroall.s [new file with mode: 0644] blob