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(parent: 5762bed) | patch
Update trigger behavior. (#70)
authorTim Newsome <tim@sifive.com>
Thu, 29 Sep 2016 18:24:04 +0000 (11:24 -0700)
committerAndrew Waterman <waterman@eecs.berkeley.edu>
Thu, 29 Sep 2016 18:24:03 +0000 (11:24 -0700)
commit02027ca74cb904ee691b7b7d9b03c46f3c1f49ac
treea54af72a6f5430e5f029867cd26bd07c2d9406actree
parent5762bedab3a671ddfd279737d370533f31ed979ecommit | diff
Update trigger behavior. (#70)

M-mode writes to tdata1 with dmode set are ignored instead of raising an
exception.
Add the same behavior for tdata2.
riscv/processor.cc diff | blob | history
Simple-V augmented version of spike