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(parent: a7e7a9f) | patch
Add some more reserve calls to RTLIL::Const
authorNotAFile <notafile@gmail.com>
Fri, 25 Mar 2022 17:46:34 +0000 (18:46 +0100)
committergatecat <gatecat@ds0.me>
Fri, 25 Mar 2022 18:38:00 +0000 (18:38 +0000)
commit349c0ff0a7349a05fbb4381ba5b5ebb16b92261c
treed7808a03372f47d3f6666df2b2e9236c79429c52tree
parenta7e7a9f485f82f131a7b8dd8e3254b38f575eb5bcommit | diff
Add some more reserve calls to RTLIL::Const

This results in a slight ~0.22% total speedup synthesizing vexriscv
kernel/rtlil.cc diff | blob | history