[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be...
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Fri, 22 May 2020 01:11:00 +0000 (01:11 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 22 May 2020 01:11:01 +0000 (02:11 +0100)
commit396b71a9034c475f4f3e1d97991d585b38d0408d
treef7a7386fc1c1f65efbf54cacc16cd8aacf7a4d3b
parent2dca8baa83c279ccd49658c18a3dcd27bb5ae2ff
[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
90/3cb2a3176514b5e7d15043f571b6e649f24587 [new file with mode: 0644]