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(parent: 6c51abf) | patch
okaaaay, long story. using GPR(_RT) <- something will *not* get
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Aug 2022 14:17:26 +0000 (15:17 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 26 Aug 2022 14:17:26 +0000 (15:17 +0100)
commit3c9acf89fda9dbce3e2b49318c35c87f860af5b0
tree041a88fe415cc67f145e46b5aa419c924f1294ddtree
parent6c51abf53294cb95fd67ae0c8c72c3509cbfd60dcommit | diff
okaaaay, long story. using GPR(_RT) <- something will *not* get
detected by parser.py as an output register.  therefore, the modified
registers were (SVSTATE, CTR) *not* (RT, SVSTATE, CTR).
this resulted in *SVSTATE* being tested for Rc=1, not RT.
added unit tests to catch "setvl."
openpower/isa/simplev.mdwn diff | blob | history
src/openpower/decoder/isa/test_caller_setvl.py diff | blob | history