verilog: fix size and signedness of array querying functions
authorJannis Harder <me@jix.one>
Fri, 20 May 2022 19:46:39 +0000 (21:46 +0200)
committerZachary Snow <zachary.j.snow@gmail.com>
Mon, 30 May 2022 13:11:31 +0000 (09:11 -0400)
commit4bfaaea0d52c235bb51c4dc54b07fe301eebe473
treeff66a42daace95c965c6851036f907771d61af25
parentce24208a8bf74c25868c5073b0ff68a76b71d99f
verilog: fix size and signedness of array querying functions

genrtlil.cc and simplify.cc had inconsistent and slightly broken
handling of signedness for array querying functions. These functions are
defined to return a signed result. Simplify always produced an unsigned
and genrtlil always a signed 32-bit result ignoring the context.

Includes tests for the the relvant edge cases for context dependent
conversions.
CHANGELOG
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc
tests/verilog/sign_array_query.ys [new file with mode: 0644]