RISC-V: Add support for the Zvknh[a,b] ISA extensions
authorChristoph Müllner <christoph.muellner@vrull.eu>
Fri, 30 Jun 2023 20:43:55 +0000 (22:43 +0200)
committerJeff Law <jlaw@ventanamicro>
Sat, 1 Jul 2023 13:28:40 +0000 (07:28 -0600)
commit62edb233ef5fff5356c46570b3ba19dcbe6ceb35
tree96fdd45a48f4d3e2f6d94e5b7833760b82afe60a
parentfce8fef965904dc16ffba2388ba44003e61cd908
RISC-V: Add support for the Zvknh[a,b] ISA extensions

Zvknh[a,b] are parts of the vector crypto extensions.

This extension adds the following instructions:
- vsha2ms.vv
- vsha2c[hl].vv

bfd/ChangeLog:

* elfxx-riscv.c (riscv_multi_subset_supports): Add instruction
class support for Zvknh[a,b].
(riscv_multi_subset_supports_ext): Likewise.

gas/ChangeLog:

* testsuite/gas/riscv/zvknha.d: New test.
* testsuite/gas/riscv/zvknha_zvknhb.s: New test.
* testsuite/gas/riscv/zvknhb.d: New test.

include/ChangeLog:

* opcode/riscv-opc.h (MATCH_VSHA2CH_VV): New.
(MASK_VSHA2CH_VV): New.
(MATCH_VSHA2CL_VV): New.
(MASK_VSHA2CL_VV): New.
(MATCH_VSHA2MS_VV): New.
(MASK_VSHA2MS_VV): New.
(DECLARE_INSN): New.
* opcode/riscv.h (enum riscv_insn_class): Add instruction class
support for Zvknh[a,b].

opcodes/ChangeLog:

* riscv-opc.c: Add Zvknh[a,b] instructions.

Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
bfd/elfxx-riscv.c
gas/testsuite/gas/riscv/zvknha.d [new file with mode: 0644]
gas/testsuite/gas/riscv/zvknha_zvknhb.s [new file with mode: 0644]
gas/testsuite/gas/riscv/zvknhb.d [new file with mode: 0644]
include/opcode/riscv-opc.h
include/opcode/riscv.h
opcodes/riscv-opc.c