arm: Relax ordering for some uncacheable accesses
authorAndreas Sandberg <Andreas.Sandberg@ARM.com>
Tue, 5 May 2015 07:22:34 +0000 (03:22 -0400)
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>
Tue, 5 May 2015 07:22:34 +0000 (03:22 -0400)
commit706597f021811511e71fddeeab7dcfc33bfd5f35
tree3967d475572bc0e380ee430eec9035ba35b0d216
parent48281375ee23283d24cf9d7fe5f6315afdb3a6fc
arm: Relax ordering for some uncacheable accesses

We currently assume that all uncacheable memory accesses are strictly
ordered. Instead of always enforcing strict ordering, we now only
enforce it if the required memory type is device memory or strongly
ordered memory.
src/arch/arm/tlb.cc