arch-power: Added support for Atomic Instructions
authorKajoljain379 <kajoljain797@gmail.com>
Wed, 10 Apr 2019 05:46:01 +0000 (05:46 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 24 Jan 2021 04:00:51 +0000 (04:00 +0000)
commit750d6e9bf65596c618c8fcf92fadb3382475983a
tree3d39e6f0c4f8a9d20178c248f052cf71f2b6ecbf
parentf88bab70cffdeac1d2d82d36ac5e445321e7f11d
arch-power: Added support for Atomic Instructions

Add support for Load and Reserve and Store Conditional Instructions:

* Load Byte And Reserve Indexed.
* Store Byte Conditional Indexed.
* Load Halfword And Reserve Indexed.
* Store Halfword Conditional Indexed.
* Load Word And Reserve Indexed.
* Store Word Conditional Indexed.
* Load Doubleword And Reserve Indexed.
* Store Doubleword Conditional Indexed.

Change-Id: I1dac94928e7a1bb6f458a4ecea0fca3247b26d37
Signed-off-by: Kajoljain379 <kajoljain797@gmail.com>
src/arch/power/isa/decoder.isa
src/arch/power/isa/formats/util.isa
src/arch/power/locked_mem.hh