verilog: Use proc memory writes in the frontend.
authorMarcelina Kościelnicka <mwk@0x04.net>
Tue, 23 Feb 2021 15:48:29 +0000 (16:48 +0100)
committerMarcelina Kościelnicka <mwk@0x04.net>
Mon, 8 Mar 2021 19:16:29 +0000 (20:16 +0100)
commit89c74ffd7189d4898feb476ff70376385d516eb2
tree89b1c5f786bc79da9e48ed59e8a33f66088ea523
parent4e03865d5bf3fafe0bd3735c88431675d53d2663
verilog: Use proc memory writes in the frontend.
frontends/ast/ast.cc
frontends/ast/ast.h
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc
manual/CHAPTER_Verilog.tex