projects / libreriscv.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 0a2a8e1) | patch
Talk about selective powerdown of the CPU - eg Vector-Scalar Registers when they...
authorAlain D D Williams <addw@phcomp.co.uk>
Fri, 9 Apr 2021 18:26:21 +0000 (19:26 +0100)
committerAlain D D Williams <addw@phcomp.co.uk>
Fri, 9 Apr 2021 18:26:21 +0000 (19:26 +0100)
commit9a173836b5449a5bf117b66c13b36ef141fc1fcb
tree4b81c109be0ba89ada21f4af66de37e1c9b336c1tree
parent0a2a8e18631620805309ca00da8199d23fd25b59commit | diff
Talk about selective powerdown of the CPU - eg Vector-Scalar Registers when they are not being used
ISA/power-saving.mdwn [new file with mode: 0644] blob
future_feature_proposals.mdwn diff | blob | history
http://libre-riscv.org ikiwiki