soc/interconnect/axi: improve SRAM/CSR access speed
authorJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 09:28:21 +0000 (11:28 +0200)
committerJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 09:44:14 +0000 (11:44 +0200)
commita5be2cd2576a0d2ba5e5c1bd3a5a609bef7431eb
treef0bc9df2e865edd5e88c1ab02bfece1abf3d616b
parentd8a242d86f56ff02c676f5678e060966840e0749
soc/interconnect/axi: improve SRAM/CSR access speed
litex/soc/interconnect/axi.py