correct relative link to FreePDK45_c4m45, use submodule
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Apr 2021 13:43:30 +0000 (13:43 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Apr 2021 13:43:30 +0000 (13:43 +0000)
commitb9fb3a330b3900a23edef0319449f3344418a156
tree5246a23c15de3b3b0e380fecdafebe5e4ed4a0aa
parent239d79763b1962238a42fd36b26db8d9c105a850
correct relative link to FreePDK45_c4m45, use submodule
add note about remembering to run git submodule
experiments10_verilog/freepdk_c4m45/Makefile
experiments10_verilog/freepdk_c4m45/build_full.sh
experiments10_verilog/freepdk_c4m45/mksym.sh