RISC-V: Add support for the Zvkned ISA extension

RISC-V: Add support for the Zvkned ISA extension

Zvkned is part of the vector crypto extensions.

This extension adds the following instructions:
- vaesef.[vv,vs]
- vaesem.[vv,vs]
- vaesdf.[vv,vs]
- vaesdm.[vv,vs]
- vaeskf1.vi
- vaeskf2.vi
- vaesz.vs

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_multi_subset_supports): Add instruction
	class support for Zvkned.
	(riscv_multi_subset_supports_ext): Likewise.

gas/ChangeLog:

	* testsuite/gas/riscv/zvkned.d: New test.
	* testsuite/gas/riscv/zvkned.s: New test.

include/ChangeLog:

	* opcode/riscv-opc.h (MATCH_VAESDF_VS): New.
	(MASK_VAESDF_VS): New.
	(MATCH_VAESDF_VV): New.
	(MASK_VAESDF_VV): New.
	(MATCH_VAESDM_VS): New.
	(MASK_VAESDM_VS): New.
	(MATCH_VAESDM_VV): New.
	(MASK_VAESDM_VV): New.
	(MATCH_VAESEF_VS): New.
	(MASK_VAESEF_VS): New.
	(MATCH_VAESEF_VV): New.
	(MASK_VAESEF_VV): New.
	(MATCH_VAESEM_VS): New.
	(MASK_VAESEM_VS): New.
	(MATCH_VAESEM_VV): New.
	(MASK_VAESEM_VV): New.
	(MATCH_VAESKF1_VI): New.
	(MASK_VAESKF1_VI): New.
	(MATCH_VAESKF2_VI): New.
	(MASK_VAESKF2_VI): New.
	(MATCH_VAESZ_VS): New.
	(MASK_VAESZ_VS): New.
	(DECLARE_INSN): New.
	* opcode/riscv.h (enum riscv_insn_class): Add instruction class
	support for Zvkned.

opcodes/ChangeLog:

	* riscv-opc.c: Add Zvkned instructions.

Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>