+ self.assertEqual(
+ repr(assigned_registers), "{"
+ "<store_dest.inp2.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<store_dest.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<store_dest.inp0.copy.outputs[0]: <I64*6>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=6), "
+ "<store_dest.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<setvl6.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<concat_retval.out0.copy.outputs[0]: <I64*6>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=6), "
+ "<concat_retval.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<concat_retval.outputs[0]: <I64*6>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=6), "
+ "<concat_retval.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<concat_retval.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<concat_retval.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<concat_retval.inp3.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<concat_retval.inp4.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
+ "<concat_retval.inp5.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=8, reg_len=1), "
+ "<concat_retval.inp6.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<retval_setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add_hi2.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=9, reg_len=1), "
+ "<clear_ca2.outputs[0]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add2.outputs[1]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add_hi2.outputs[1]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add_hi2.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add_hi2.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add2_rt_spread.out2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=10, reg_len=1), "
+ "<add2_rt_spread.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
+ "<add2_rt_spread.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
+ "<add2_rt_spread.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add2_rt_spread.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add2_rt_spread.outputs[2]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<add2_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add2_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add2.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add2.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2.inp1.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
+ "<add2.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=9, reg_len=3), "
+ "<add2.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2_rb_concat.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add2_rb_concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add2_rb_concat.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add2_rb_concat.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add2_rb_concat.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add2_rb_concat.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<add2_rb_concat.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul2.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
+ "<mul2.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
+ "<mul2.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul2.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<mul2.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<mul2.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=3), "
+ "<mul2.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul2.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
+ "<mul2.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
+ "<mul2.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add_hi1.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
+ "<clear_ca1.outputs[0]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add1.outputs[1]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add_hi1.outputs[1]: <CA>>: "
+ "Loc(kind=LocKind.CA, start=0, reg_len=1), "
+ "<add_hi1.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add_hi1.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add1_rt_spread.out2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
+ "<add1_rt_spread.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
+ "<add1_rt_spread.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=16, reg_len=1), "
+ "<add1_rt_spread.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add1_rt_spread.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add1_rt_spread.outputs[2]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<add1_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add1_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add1.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add1.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1.inp1.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
+ "<add1.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=9, reg_len=3), "
+ "<add1.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1_rb_concat.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add1_rb_concat.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<add1_rb_concat.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<add1_rb_concat.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<add1_rb_concat.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<add1_rb_concat.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<add1_rb_concat.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul1.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
+ "<mul1.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=3), "
+ "<mul1.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul1.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<mul1.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<mul1.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=3), "
+ "<mul1.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul1.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
+ "<mul1.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
+ "<mul1.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul0_rt_spread.out2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=11, reg_len=1), "
+ "<mul0_rt_spread.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=12, reg_len=1), "
+ "<mul0_rt_spread.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=17, reg_len=1), "
+ "<mul0_rt_spread.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<mul0_rt_spread.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<mul0_rt_spread.outputs[2]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<mul0_rt_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul0_rt_spread.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<mul0_rt_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul0.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=15, reg_len=1), "
+ "<mul0.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<mul0.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul0.inp2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<mul0.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<mul0.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<mul0.inp3.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<mul0.inp1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
+ "<mul0.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=8, reg_len=3), "
+ "<mul0.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<zero.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=18, reg_len=1), "
+ "<zero.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1), "
+ "<lhs_setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<rhs_spread.out2.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=19, reg_len=1), "
+ "<rhs_spread.out1.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=14, reg_len=1), "
+ "<rhs_spread.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=4, reg_len=1), "
+ "<rhs_spread.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=5, reg_len=1), "
+ "<rhs_spread.outputs[1]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<rhs_spread.outputs[2]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=7, reg_len=1), "
+ "<rhs_spread.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<rhs_spread.inp0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<rhs_spread.inp0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<rhs_setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<load_rhs.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<load_rhs.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<load_rhs.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<load_rhs.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<load_rhs.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<load_lhs.out0.copy.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=20, reg_len=3), "
+ "<load_lhs.out0.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<load_lhs.outputs[0]: <I64*3>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=3), "
+ "<load_lhs.inp1.setvl.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<load_lhs.inp0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=6, reg_len=1), "
+ "<setvl3.outputs[0]: <VL_MAXVL>>: "
+ "Loc(kind=LocKind.VL_MAXVL, start=0, reg_len=1), "
+ "<ptr_in.out0.copy.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=23, reg_len=1), "
+ "<ptr_in.outputs[0]: <I64>>: "
+ "Loc(kind=LocKind.GPR, start=3, reg_len=1)"
+ "}")