remove whitespace

diff --git a/TLB/src/Cam.py b/TLB/src/Cam.py
index ab8f2c151109b20d911838fb5ddba72ed50b0677..1cb88d88ed866128a9d10b9326c1816eb5fe15ab 100644 (file)
--- a/TLB/src/Cam.py
+++ b/TLB/src/Cam.py
@@ -24,9 +24,9 @@ class Cam():
         Notes:
         The read and write operations take one clock cycle to complete.
         Currently the read_warning line is present for interfacing but
         Notes:
         The read and write operations take one clock cycle to complete.
         Currently the read_warning line is present for interfacing but

-        is not necessary for this design. This module is capable of writing 
+        is not necessary for this design. This module is capable of writing

         in the first cycle, reading on the second, and output the correct
         in the first cycle, reading on the second, and output the correct

-        address on the third. 
+        address on the third.

     """
 
     def __init__(self, data_size, cam_size):
     """
 
     def __init__(self, data_size, cam_size):