- with self.m.If(n_i_ready): # next stage is ready
- with self.m.If(self.p._o_ready): # not stalled
- # nothing in buffer: send (processed) input direct to output
- self.m.d.sync += [self.n.o_valid.eq(p_i_valid),
- eq(self.n.o_data, result), # update output
- ]
- # (n.i_ready) is false here: next stage is ready
- with self.m.Elif(o_n_validn): # next stage being told "ready"
- self.m.d.sync += [self.n.o_valid.eq(p_i_valid),
- eq(self.n.o_data, result), # set output data
- ]
-
- with self.m.If(n_i_ready & ~self.p._o_ready): # not stalled
- # Flush the [already processed] buffer to the output port.
- self.m.d.sync += [self.n.o_valid.eq(1), # reg empty
+ # data pass-through conditions
+ with self.m.If(npnn):
+ self.m.d.sync += [self.n.o_valid.eq(p_i_valid), # valid if p_valid
+ eq(self.n.o_data, result), # update output
+ ]
+ # buffer flush conditions (NOTE: n.o_valid override data passthru)
+ with self.m.If(nir_por_n): # not stalled
+ # Flush the [already processed] buffer to the output port.
+ self.m.d.sync += [self.n.o_valid.eq(1), # reg empty