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pep8 cleanup
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 25 Jul 2018 06:12:38 +0000
(07:12 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 25 Jul 2018 06:12:38 +0000
(07:12 +0100)
src/bsv/interface_decl.py
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src/bsv/peripheral_gen/base.py
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src/bsv/peripheral_gen/gpio.py
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src/bsv/peripheral_gen/jtag.py
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src/bsv/peripheral_gen/qspi.py
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src/bsv/peripheral_gen/sdmmc.py
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src/bsv/peripheral_gen/spi.py
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src/spec/i_class.py
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src/spec/pinfunctions.py
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diff --git
a/src/bsv/interface_decl.py
b/src/bsv/interface_decl.py
index 404cfd4ccb64ffaff56101146586d5c2c13a7201..1efeac1d6519079abe24141709b5b13b1f780cc1 100644
(file)
--- a/
src/bsv/interface_decl.py
+++ b/
src/bsv/interface_decl.py
@@
-359,7
+359,7
@@
class Interface(PeripheralIface):
plens = range(len(pins))
else:
for i in range(0, len(pins), 3):
plens = range(len(pins))
else:
for i in range(0, len(pins), 3):
- plens += [i
/3, i/3, i/
3]
+ plens += [i
/ 3, i / 3, i /
3]
for (typ, txt) in map(self.ifacedef3pin, plens, pins):
if typ == 'tput':
tput.append(txt)
for (typ, txt) in map(self.ifacedef3pin, plens, pins):
if typ == 'tput':
tput.append(txt)
@@
-378,14
+378,14
@@
class Interface(PeripheralIface):
endmethod
endinterface;
""",
endmethod
endinterface;
""",
-"""\
+
"""\
interface {3} = interface Put#({0})
method Action put({2} in);
{1}
endmethod
endinterface;
""",
interface {3} = interface Put#({0})
method Action put({2} in);
{1}
endmethod
endinterface;
""",
-"""\
+
"""\
interface {3} = interface Get#({0})
method ActionValue#({2}) get;
{2} tget;
interface {3} = interface Get#({0})
method ActionValue#({2}) get;
{2} tget;
@@
-429,7
+429,7
@@
class InterfaceBus(object):
def __init__(self, namelist, bitspec, filterbus):
self.namelist = namelist
self.bitspec = bitspec
def __init__(self, namelist, bitspec, filterbus):
self.namelist = namelist
self.bitspec = bitspec
- self.fbus = filterbus # filter identifying which are bus pins
+ self.fbus = filterbus
# filter identifying which are bus pins
def get_nonbuspins(self):
return filter(lambda x: not x.name_.startswith(self.fbus), self.pins)
def get_nonbuspins(self):
return filter(lambda x: not x.name_.startswith(self.fbus), self.pins)
@@
-463,8
+463,8
@@
class InterfaceBus(object):
pins = self.get_buspins()
plen = self.get_n_iopins(pins)
bitspec = self.bitspec.format(plen)
pins = self.get_buspins()
plen = self.get_n_iopins(pins)
bitspec = self.bitspec.format(plen)
- return '\n' + res + self.vectorifacedef2(
pins, plen,
-
self.namelist, bitspec, *args) + '\n'
+ return '\n' + res + self.vectorifacedef2(
+
pins, plen,
self.namelist, bitspec, *args) + '\n'
def ifacedef3pin(self, idx, pin):
decfn = self.ifacefmtdecfn2
def ifacedef3pin(self, idx, pin):
decfn = self.ifacefmtdecfn2
@@
-484,8
+484,8
@@
class InterfaceLCD(InterfaceBus, Interface):
"Bit#({0})", "out")
Interface.__init__(self, *args)
"Bit#({0})", "out")
Interface.__init__(self, *args)
- def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3
- return len(pins)
+ def get_n_iopins(self, pins):
# HACK! assume in/out/outen so div by 3
+ return len(pins)
class InterfaceSD(InterfaceBus, Interface):
class InterfaceSD(InterfaceBus, Interface):
@@
-495,7
+495,7
@@
class InterfaceSD(InterfaceBus, Interface):
"Bit#({0})", "d")
Interface.__init__(self, *args)
"Bit#({0})", "d")
Interface.__init__(self, *args)
- def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3
+ def get_n_iopins(self, pins):
# HACK! assume in/out/outen so div by 3
return len(pins) / 3
return len(pins) / 3
@@
-506,13
+506,14
@@
class InterfaceNSPI(InterfaceBus, Interface):
"Bit#({0})", "io")
Interface.__init__(self, *args)
"Bit#({0})", "io")
Interface.__init__(self, *args)
- def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3
+ def get_n_iopins(self, pins):
# HACK! assume in/out/outen so div by 3
return len(pins) / 3
class InterfaceEINT(Interface):
""" uses old-style (non-get/put) for now
"""
return len(pins) / 3
class InterfaceEINT(Interface):
""" uses old-style (non-get/put) for now
"""
+
def ifacepfmt(self, *args):
res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args)
return '\n' + res # pins is a list
def ifacepfmt(self, *args):
res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args)
return '\n' + res # pins is a list
@@
-521,7
+522,6
@@
class InterfaceEINT(Interface):
return self.ifacedef(*args)
return self.ifacedef(*args)
-
class InterfaceGPIO(InterfaceBus, Interface):
""" note: the busfilter cuts out everything as the entire set of pins
is a bus, but it's less code. get_nonbuspins returns empty list.
class InterfaceGPIO(InterfaceBus, Interface):
""" note: the busfilter cuts out everything as the entire set of pins
is a bus, but it's less code. get_nonbuspins returns empty list.
@@
-532,7
+532,7
@@
class InterfaceGPIO(InterfaceBus, Interface):
"Vector#({0},Bit#(1))", ifacename[-1])
Interface.__init__(self, ifacename, pinspecs, ganged, single)
"Vector#({0},Bit#(1))", ifacename[-1])
Interface.__init__(self, ifacename, pinspecs, ganged, single)
- def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3
+ def get_n_iopins(self, pins):
# HACK! assume in/out/outen so div by 3
return len(pins) / 3
return len(pins) / 3
diff --git
a/src/bsv/peripheral_gen/base.py
b/src/bsv/peripheral_gen/base.py
index fef5dbe5b3090e61af88b1649716292cb4e4fac2..0d4384b1c25752a2a107164354b67698df37098b 100644
(file)
--- a/
src/bsv/peripheral_gen/base.py
+++ b/
src/bsv/peripheral_gen/base.py
@@
-187,7
+187,6
@@
class PBase(object):
return template.format(pname, sname)
return template.format(pname, sname)
-
mkplic_rule = """\
rule rl_connect_{0}_to_plic_{2};
if({1} == 1'b1) begin
mkplic_rule = """\
rule rl_connect_{0}_to_plic_{2};
if({1} == 1'b1) begin
@@
-436,6
+435,7
@@
class PeripheralInterfaces(object):
iname = self.data[name].iname().format(i)
return iname in self.fastbus
iname = self.data[name].iname().format(i)
return iname in self.fastbus
+
class PFactory(object):
def getcls(self, name):
from uart import uart
class PFactory(object):
def getcls(self, name):
from uart import uart
diff --git
a/src/bsv/peripheral_gen/gpio.py
b/src/bsv/peripheral_gen/gpio.py
index 4b6ab4c9c300275c6e02f366e89dc00ca7cd8ca9..418454ba8eadb62d58e6f62638b5cd6645fc5891 100644
(file)
--- a/
src/bsv/peripheral_gen/gpio.py
+++ b/
src/bsv/peripheral_gen/gpio.py
@@
-11,7
+11,7
@@
class gpio(PBase):
def slowifdeclmux(self, name, count):
size = len(self.peripheral.pinspecs)
return " interface GPIO_config#(%d) pad_config%d;" % \
def slowifdeclmux(self, name, count):
size = len(self.peripheral.pinspecs)
return " interface GPIO_config#(%d) pad_config%d;" % \
-
(size, count)
+ (size, count)
def num_axi_regs32(self):
return 2
def num_axi_regs32(self):
return 2
diff --git
a/src/bsv/peripheral_gen/jtag.py
b/src/bsv/peripheral_gen/jtag.py
index 6aca84e36624e44fcc152546ed7b913c994c423c..a4092803ebdb20cd18fbe9687a47aa231cc0456c 100644
(file)
--- a/
src/bsv/peripheral_gen/jtag.py
+++ b/
src/bsv/peripheral_gen/jtag.py
@@
-11,4
+11,3
@@
class jtag(PBase):
def axi_addr_map(self, name, ifacenum):
return ''
def axi_addr_map(self, name, ifacenum):
return ''
-
diff --git
a/src/bsv/peripheral_gen/qspi.py
b/src/bsv/peripheral_gen/qspi.py
index 18ae219b2e4b31a8998c7396be7f4885fd6990a3..fddbd813b5409884bf8e5c60cd29c4e4f015205a 100644
(file)
--- a/
src/bsv/peripheral_gen/qspi.py
+++ b/
src/bsv/peripheral_gen/qspi.py
@@
-1,9
+1,11
@@
from bsv.peripheral_gen.nspi import nspi
from bsv.peripheral_gen.nspi import nspi
+
class mqspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, True)
class mqspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, True)
+
class qspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, False)
class qspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, False)
diff --git
a/src/bsv/peripheral_gen/sdmmc.py
b/src/bsv/peripheral_gen/sdmmc.py
index 69f2d763cef083e5828f28234482423122e6eab3..e963eb7f8be4d61df1edc5125d317bcb40e7d357 100644
(file)
--- a/
src/bsv/peripheral_gen/sdmmc.py
+++ b/
src/bsv/peripheral_gen/sdmmc.py
@@
-32,4
+32,3
@@
class sdmmc(PBase):
for ptype in ['out', 'out_en', 'in']:
ret.append(template.format(ps, ptype, n))
return '\n'.join(ret)
for ptype in ['out', 'out_en', 'in']:
ret.append(template.format(ps, ptype, n))
return '\n'.join(ret)
-
diff --git
a/src/bsv/peripheral_gen/spi.py
b/src/bsv/peripheral_gen/spi.py
index 8b347ae28f72c7956cebfcffb5e2af342889ddaa..baec1bf56fc42bd4e60aef82f39f760402d7edd7 100644
(file)
--- a/
src/bsv/peripheral_gen/spi.py
+++ b/
src/bsv/peripheral_gen/spi.py
@@
-1,10
+1,11
@@
from bsv.peripheral_gen.nspi import nspi
from bsv.peripheral_gen.nspi import nspi
+
class mspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, True)
class mspi(nspi):
def __init__(self, name):
nspi.__init__(self, name, True)
+
class spi(nspi):
def __init__(self, name):
nspi.__init__(self, name, False)
class spi(nspi):
def __init__(self, name):
nspi.__init__(self, name, False)
-
diff --git
a/src/spec/i_class.py
b/src/spec/i_class.py
index 5d73b26fdba028766c0d8e6424614e19c26ed98f..e70414cfbb4c263aa62c48c07e1aff03eeae1939 100644
(file)
--- a/
src/spec/i_class.py
+++ b/
src/spec/i_class.py
@@
-90,7
+90,7
@@
def pinspec():
# lists (interfaces, EINTs, PWMs) from available pins.
i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0',
# lists (interfaces, EINTs, PWMs) from available pins.
i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0',
-
'TWI0', 'MSPI0', 'B3:SD1', ]
+ 'TWI0', 'MSPI0', 'B3:SD1', ]
i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
i_class_pwm = ['B2:PWM_0']
descriptions = {
i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
i_class_pwm = ['B2:PWM_0']
descriptions = {
diff --git
a/src/spec/pinfunctions.py
b/src/spec/pinfunctions.py
index 0aa4ae8ba8f79e454798f5c0d9f61ba6be2e62b4..33226e4ea4036c6c78bca43db590b067769a3aea 100644
(file)
--- a/
src/spec/pinfunctions.py
+++ b/
src/spec/pinfunctions.py
@@
-73,6
+73,7
@@
def nspi(suffix, bank, iosize, masteronly=True):
inout.append(pname)
return (qpins, inout)
inout.append(pname)
return (qpins, inout)
+
def mspi(suffix, bank):
return nspi(suffix, bank, 2, masteronly=True)
def mspi(suffix, bank):
return nspi(suffix, bank, 2, masteronly=True)