mem: Add missing stats update for uncacheable MSHRs
authorAndreas Hansson <andreas.hansson@arm.com>
Tue, 5 May 2015 07:22:24 +0000 (03:22 -0400)
committerAndreas Hansson <andreas.hansson@arm.com>
Tue, 5 May 2015 07:22:24 +0000 (03:22 -0400)
This patch adds a missing counter update for the uncacheable
accesses. By updating this counter we also get a meaningful average
latency for uncacheable accesses (previously inf).

src/mem/cache/cache_impl.hh

index a530001ae3958b783cdf4c151125b697c2874d42..6817db41ef0ee151460d53bd4022de623cf2a392 100644 (file)
@@ -701,8 +701,10 @@ Cache::recvTimingReq(PacketPtr pkt)
             }
         } else {
             // no MSHR
-            if (!pkt->req->isUncacheable()) {
-                assert(pkt->req->masterId() < system->maxMasters());
+            assert(pkt->req->masterId() < system->maxMasters());
+            if (pkt->req->isUncacheable()) {
+                mshr_uncacheable[pkt->cmdToIndex()][pkt->req->masterId()]++;
+            } else {
                 mshr_misses[pkt->cmdToIndex()][pkt->req->masterId()]++;
             }