add TODO comments about using platform.add_resources

diff --git a/src/ls2.py b/src/ls2.py
index 6652b60bf553b7fdb60ae504e2e851e056160e94..64c5126035dee2a938d8c34acae903c799dea98a 100644 (file)
--- a/src/ls2.py
+++ b/src/ls2.py
@@ -671,7 +671,15 @@ def build_platform(fpga, firmware):
     # Get Ethernet RMII resource pins
     ethmac_0_pins = None
     if platform is not None and fpga in ['versa_ecp5', 'versa_ecp5_85', 'isim']:
-            ethmac_0_pins = platform.request("ethmac_0", 0,
+        # TODO, like this, which needs a patch to nmigen_boards
+        # from nmigen_boards.resources.interfaces import RMIIResource
+        # hyperram_ios = RMIIResource(0, cs_n="V12 V14 U12 U14",
+        #                                dq="D4 D3 F4 F3 G2 H2 D2 E2",
+        #                                rwds="U13", rst_n="T13", ck_p="V10",
+        #                                attrs=Attrs(IOSTANDARD="LVCMOS33"))
+        #platform.add_resources(hyperram_ios)
+        #hyperram_pins = platform.request("hyperram")
+        ethmac_0_pins = platform.request("ethmac_0", 0,
                                         dir={"mtx_clk":"i", "mtxd":"o",
                                              "mtxen":"o",
                                              "mtxerr":"o", "mrx_clk":"i",