C.ADDIW is reserved for rd=0

diff --git a/riscv/insns/c_jal.h b/riscv/insns/c_jal.h
index 068c441ee2c3f02f36c94d0b49af63371c89f036..4f156f61fbe3dc22b9565225ee7dcf5bfc57fdea 100644 (file)
--- a/riscv/insns/c_jal.h
+++ b/riscv/insns/c_jal.h
@@ -3,6 +3,7 @@ if (xlen == 32) {
   reg_t tmp = npc;
   set_pc(pc + insn.rvc_j_imm());
   WRITE_REG(X_RA, tmp);
-} else {
+} else { // c.addiw
+  require(insn.rvc_rd() != 0);
   WRITE_RD(sext32(RVC_RS1 + insn.rvc_imm()));
 }