log load/stores to InstrInOuts

diff --git a/src/openpower/decoder/isa/mem.py b/src/openpower/decoder/isa/mem.py
index ebd86bb823c68dc4e1c570ebdf9da2502666005b..7b8c2dda4a24c9f822e40ff78061b2f3568aee4e 100644 (file)
--- a/src/openpower/decoder/isa/mem.py
+++ b/src/openpower/decoder/isa/mem.py
@@ -199,11 +199,11 @@ class MemCommon:
 
     def __call__(self, addr, sz):
         val = self.ld(addr.value, sz, swap=False)
-        log("memread", addr, sz, val)
+        log("memread", addr, sz, hex(val), kind=LogType.InstrInOuts)
         return SelectableInt(val, sz*8)
 
     def memassign(self, addr, sz, val):
-        log("memassign", addr, sz, val)
+        log("memassign", addr, sz, val, kind=LogType.InstrInOuts)
         self.st(addr.value, val.value, sz, swap=False)
 
     def dump(self, printout=True, asciidump=False):