Add Verific -work parameter

Signed-off-by: Clifford Wolf <clifford@clifford.at>

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index b8c0375ceb07b8d6730cdb28ca56c940384eb915..cb31634ddbe1312a4d2126b2c08f23f932e73c74 100644 (file)
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -1837,6 +1837,7 @@ struct VerificPass : public Pass {
                log("Built with Verific %s, released at %s.\n", release_str, release_tmstr);
 
                int argidx = 1;
+               std::string work = "work";
 
                if (GetSize(args) > argidx && (args[argidx] == "-set-error" || args[argidx] == "-set-warning" ||
                                args[argidx] == "-set-info" || args[argidx] == "-set-ignore"))
@@ -1895,6 +1896,15 @@ struct VerificPass : public Pass {
                        goto check_error;
                }
 
+               for (; argidx < GetSize(args); argidx++)
+               {
+                       if (args[argidx] == "-work" && argidx+1 < GetSize(args)) {
+                               work = args[++argidx];
+                               continue;
+                       }
+                       break;
+               }
+
                if (GetSize(args) > argidx && (args[argidx] == "-vlog95" || args[argidx] == "-vlog2k" || args[argidx] == "-sv2005" ||
                                args[argidx] == "-sv2009" || args[argidx] == "-sv2012" || args[argidx] == "-sv" || args[argidx] == "-formal"))
                {
@@ -1942,7 +1952,7 @@ struct VerificPass : public Pass {
                        while (argidx < GetSize(args))
                                file_names.Insert(args[argidx++].c_str());
 
-                       if (!veri_file::AnalyzeMultipleFiles(&file_names, verilog_mode, "work", veri_file::MFCU))
+                       if (!veri_file::AnalyzeMultipleFiles(&file_names, verilog_mode, work.c_str(), veri_file::MFCU))
                                        log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
 
                        verific_import_pending = true;
@@ -1952,7 +1962,7 @@ struct VerificPass : public Pass {
                if (GetSize(args) > argidx && args[argidx] == "-vhdl87") {
                        vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1987").c_str());
                        for (argidx++; argidx < GetSize(args); argidx++)
-                               if (!vhdl_file::Analyze(args[argidx].c_str(), "work", vhdl_file::VHDL_87))
+                               if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_87))
                                        log_cmd_error("Reading `%s' in VHDL_87 mode failed.\n", args[argidx].c_str());
                        verific_import_pending = true;
                        goto check_error;
@@ -1961,7 +1971,7 @@ struct VerificPass : public Pass {
                if (GetSize(args) > argidx && args[argidx] == "-vhdl93") {
                        vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str());
                        for (argidx++; argidx < GetSize(args); argidx++)
-                               if (!vhdl_file::Analyze(args[argidx].c_str(), "work", vhdl_file::VHDL_93))
+                               if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_93))
                                        log_cmd_error("Reading `%s' in VHDL_93 mode failed.\n", args[argidx].c_str());
                        verific_import_pending = true;
                        goto check_error;
@@ -1970,7 +1980,7 @@ struct VerificPass : public Pass {
                if (GetSize(args) > argidx && args[argidx] == "-vhdl2k") {
                        vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_1993").c_str());
                        for (argidx++; argidx < GetSize(args); argidx++)
-                               if (!vhdl_file::Analyze(args[argidx].c_str(), "work", vhdl_file::VHDL_2K))
+                               if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_2K))
                                        log_cmd_error("Reading `%s' in VHDL_2K mode failed.\n", args[argidx].c_str());
                        verific_import_pending = true;
                        goto check_error;
@@ -1979,7 +1989,7 @@ struct VerificPass : public Pass {
                if (GetSize(args) > argidx && (args[argidx] == "-vhdl2008" || args[argidx] == "-vhdl")) {
                        vhdl_file::SetDefaultLibraryPath((proc_share_dirname() + "verific/vhdl_vdbs_2008").c_str());
                        for (argidx++; argidx < GetSize(args); argidx++)
-                               if (!vhdl_file::Analyze(args[argidx].c_str(), "work", vhdl_file::VHDL_2008))
+                               if (!vhdl_file::Analyze(args[argidx].c_str(), work.c_str(), vhdl_file::VHDL_2008))
                                        log_cmd_error("Reading `%s' in VHDL_2008 mode failed.\n", args[argidx].c_str());
                        verific_import_pending = true;
                        goto check_error;
@@ -2089,8 +2099,8 @@ struct VerificPass : public Pass {
 #else
                                log("Running hier_tree::ElaborateAll().\n");
 
-                               VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary("work", 1);
-                               VeriLibrary *veri_lib = veri_file::GetLibrary("work", 1);
+                               VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary(work.c_str(), 1);
+                               VeriLibrary *veri_lib = veri_file::GetLibrary(work.c_str(), 1);
 
                                Array veri_libs, vhdl_libs;
                                if (vhdl_lib) vhdl_libs.InsertLast(vhdl_lib);
@@ -2137,7 +2147,7 @@ struct VerificPass : public Pass {
                                                continue;
                                        }
 
-                                       VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary("work", 1);
+                                       VhdlLibrary *vhdl_lib = vhdl_file::GetLibrary(work.c_str(), 1);
                                        VhdlDesignUnit *vhdl_unit = vhdl_lib->GetPrimUnit(name);
                                        if (vhdl_unit) {
                                                log("Adding VHDL unit '%s' to elaboration queue.\n", name);