MIPS16/GCC: Emit explicit JRC from `casesi_internal_mips16_<mode>' insn

	gcc/
	* config/mips/mips.md (casesi_internal_mips16_<mode>):
	Explicitly switch between JR and JRC for the table jump.  Adjust
	instruction count.

From-SVN: r242517

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 17b79e52eedc5530d3b49caec06473cf9ec563fc..9b0462151fb7dcbb66913fb0287416cf6b630b27 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
+
+       * config/mips/mips.md (casesi_internal_mips16_<mode>):
+       Explicitly switch between JR and JRC for the table jump.  Adjust
+       instruction count.
+
 2016-11-16  Maciej W. Rozycki  <macro@imgtec.com>
 
        * config/mips/mips.md (casesi_internal_mips16_<mode>): Set

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 13852ef229359775c297efda5d3e3961514c9563..076cde61857f4f10e4792c2288f932757e7fa9db 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6442,9 +6442,15 @@
 
   output_asm_insn ("<d>addu\t%4, %4, %5", operands);
 
-  return "j\t%4";
+  if (GENERATE_MIPS16E)
+    return "jrc\t%4";
+  else
+    return "jr\t%4";
 }
-  [(set_attr "insn_count" "11")])
+  [(set (attr "insn_count")
+       (if_then_else (match_test "GENERATE_MIPS16E")
+                     (const_string "10")
+                     (const_string "11")))])
 
 ;; For TARGET_USE_GOT, we save the gp in the jmp_buf as well.
 ;; While it is possible to either pull it off the stack (in the