Add expander for movp2hi and movp2qi.
authorliuhongt <hongtao.liu@intel.com>
Wed, 26 Aug 2020 07:24:10 +0000 (15:24 +0800)
committerliuhongt <hongtao.liu@intel.com>
Fri, 28 Aug 2020 07:45:00 +0000 (15:45 +0800)
2020-08-30  Uros Bizjak    <ubizjak@gmail.com>

gcc/ChangeLog:
PR target/96744
* config/i386/i386-expand.c (split_double_mode): Also handle
E_P2HImode and E_P2QImode.
* config/i386/sse.md (MASK_DWI): New define_mode_iterator.
(mov<mode>): New expander for P2HI,P2QI.
(*mov<mode>_internal): New define_insn_and_split to split
movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.

gcc/testsuite/ChangeLog:

* gcc.target/i386/double_mask_reg-1.c: New test.

gcc/config/i386/i386-expand.c
gcc/config/i386/sse.md
gcc/testsuite/gcc.target/i386/double_mask_reg-1.c [new file with mode: 0644]

index a284f7e5bb488db044bb9bc13980597dd15d51c8..e6f8b314f186a91aa700c538e36b8eceb5d3f44c 100644 (file)
@@ -116,6 +116,12 @@ split_double_mode (machine_mode mode, rtx operands[],
     case E_DImode:
       half_mode = SImode;
       break;
+    case E_P2HImode:
+      half_mode = HImode;
+      break;
+    case E_P2QImode:
+      half_mode = QImode;
+      break;
     default:
       gcc_unreachable ();
     }
index 380dc453b0d88b21f99564d50427248378cfb9cf..44aa61d87fbd55e7e6abd93073bc70ba09bc9eb7 100644 (file)
   (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL")
   (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")])
 
+(define_mode_iterator MASK_DWI [P2QI P2HI])
+
+(define_expand "mov<mode>"
+  [(set (match_operand:MASK_DWI 0 "nonimmediate_operand")
+       (match_operand:MASK_DWI 1 "nonimmediate_operand"))]
+  "TARGET_AVX512VP2INTERSECT"
+{
+  if (MEM_P (operands[1]) && MEM_P (operands[2]))
+    operands[1] = force_reg (<MODE>mode, operands[1]);
+})
+
+(define_insn_and_split "*mov<mode>_internal"
+  [(set (match_operand:MASK_DWI 0 "nonimmediate_operand" "=k,o")
+       (match_operand:MASK_DWI 1 "nonimmediate_operand" "ko,k"))]
+  "TARGET_AVX512VP2INTERSECT
+   && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0) (match_dup 1))
+   (set (match_dup 2) (match_dup 3))]
+{
+  split_double_mode (<MODE>mode, &operands[0], 2, &operands[0], &operands[2]);
+})
+
 (define_insn "avx512vp2intersect_2intersect<mode>"
   [(set (match_operand:P2QI 0 "register_operand" "=k")
        (unspec:P2QI
diff --git a/gcc/testsuite/gcc.target/i386/double_mask_reg-1.c b/gcc/testsuite/gcc.target/i386/double_mask_reg-1.c
new file mode 100644 (file)
index 0000000..79ba1ce
--- /dev/null
@@ -0,0 +1,19 @@
+/* PR target/96744  */
+/* { dg-do compile } */
+/* { dg-options "-mavx512vp2intersect -O2" } */
+
+#include<immintrin.h>
+void
+_mm512_2intersect_epi64_cut (__m512i __A, __m512i __B, __mmask8 *__U,
+    __mmask8 *__M)
+{
+  __builtin_ia32_2intersectq512 (__U, __M, (__v8di) __A, (__v8di) __B);
+}
+
+void
+_mm512_2intersect_epi32_cut (__m512i __A, __m512i __B, __mmask16 *__U,
+    __mmask16 *__M)
+{
+  __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
+}
+