Merge pull request #281 from antonblanchard/cache-tlb-parameters

Pass icache/dcache/tlb parameters down from soc

diff --git a/soc.vhdl b/soc.vhdl
index 4fcf56de3deae37e0409ce4d7b36deeec672273f..d03f114046440933309fc36478fec8de26d8d358 100644 (file)
--- a/soc.vhdl
+++ b/soc.vhdl
@@ -63,6 +63,7 @@ entity soc is
         SPI_FLASH_OFFSET   : integer := 0;
         SPI_FLASH_DEF_CKDV : natural := 2;
         SPI_FLASH_DEF_QUAD : boolean := false;
+        SPI_BOOT_CLOCKS    : boolean := true;
         LOG_LENGTH         : natural := 512;
         HAS_LITEETH        : boolean := false;
        UART0_IS_16550     : boolean := true;
@@ -778,7 +779,8 @@ begin
             generic map (
                 DATA_LINES    => SPI_FLASH_DLINES,
                 DEF_CLK_DIV   => SPI_FLASH_DEF_CKDV,
-                DEF_QUAD_READ => SPI_FLASH_DEF_QUAD
+                DEF_QUAD_READ => SPI_FLASH_DEF_QUAD,
+                BOOT_CLOCKS   => SPI_BOOT_CLOCKS
                 )
             port map(
                 rst => rst_spi,