Daily bump.
authorGCC Administrator <gccadmin@gcc.gnu.org>
Thu, 1 Oct 2020 00:16:30 +0000 (00:16 +0000)
committerGCC Administrator <gccadmin@gcc.gnu.org>
Thu, 1 Oct 2020 00:16:30 +0000 (00:16 +0000)
gcc/ChangeLog
gcc/DATESTAMP
gcc/c-family/ChangeLog
gcc/cp/ChangeLog
gcc/fortran/ChangeLog
gcc/testsuite/ChangeLog
libgomp/ChangeLog
libstdc++-v3/ChangeLog

index 4df8e961f29e3392ef2e91cebdcc8feea2295583..988351b4c2067be65c0c7a0bcc7ef258927267ac 100644 (file)
@@ -1,3 +1,184 @@
+2020-09-30  Martin Sebor  <msebor@redhat.com>
+
+       PR middle-end/97189
+       * attribs.c (attr_access::array_as_string): Avoid assuming a VLA
+       access specification string contains a closing bracket.
+
+2020-09-30  Martin Sebor  <msebor@redhat.com>
+
+       PR c/97206
+       * attribs.c (attr_access::array_as_string): Avoid modifying a shared
+       type in place and use build_type_attribute_qual_variant instead.
+
+2020-09-30  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+
+       * config/arm/arm-cpus.in: Add Cortex-A78 and Cortex-A78AE cores.
+       * config/arm/arm-tables.opt: Regenerate.
+       * config/arm/arm-tune.md: Regenerate.
+       * doc/invoke.texi: Update docs.
+
+2020-09-30  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+
+       * config/aarch64/aarch64-cores.def: Add Cortex-A78 and Cortex-A78AE cores.
+       * config/aarch64/aarch64-tune.md: Regenerate.
+       * doc/invoke.texi: Add -mtune=cortex-a78 and -mtune=cortex-a78ae.
+
+2020-09-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
+
+       PR target/96795
+       * config/arm/arm_mve.h (__ARM_mve_coerce2): Define.
+       (__arm_vaddq): Correct the scalar argument.
+       (__arm_vaddq_m): Likewise.
+       (__arm_vaddq_x): Likewise.
+       (__arm_vcmpeqq_m): Likewise.
+       (__arm_vcmpeqq): Likewise.
+       (__arm_vcmpgeq_m): Likewise.
+       (__arm_vcmpgeq): Likewise.
+       (__arm_vcmpgtq_m): Likewise.
+       (__arm_vcmpgtq): Likewise.
+       (__arm_vcmpleq_m): Likewise.
+       (__arm_vcmpleq): Likewise.
+       (__arm_vcmpltq_m): Likewise.
+       (__arm_vcmpltq): Likewise.
+       (__arm_vcmpneq_m): Likewise.
+       (__arm_vcmpneq): Likewise.
+       (__arm_vfmaq_m): Likewise.
+       (__arm_vfmaq): Likewise.
+       (__arm_vfmasq_m): Likewise.
+       (__arm_vfmasq): Likewise.
+       (__arm_vmaxnmavq): Likewise.
+       (__arm_vmaxnmavq_p): Likewise.
+       (__arm_vmaxnmvq): Likewise.
+       (__arm_vmaxnmvq_p): Likewise.
+       (__arm_vminnmavq): Likewise.
+       (__arm_vminnmavq_p): Likewise.
+       (__arm_vminnmvq): Likewise.
+       (__arm_vminnmvq_p): Likewise.
+       (__arm_vmulq_m): Likewise.
+       (__arm_vmulq): Likewise.
+       (__arm_vmulq_x): Likewise.
+       (__arm_vsetq_lane): Likewise.
+       (__arm_vsubq_m): Likewise.
+       (__arm_vsubq): Likewise.
+       (__arm_vsubq_x): Likewise.
+
+2020-09-30  Joel Hutton  <joel.hutton@arm.com>
+
+       PR target/96837
+       * tree-vect-slp.c (vect_analyze_slp): Do not call
+       vect_attempt_slp_rearrange_stmts for vector constructors.
+
+2020-09-30  Tamar Christina  <tamar.christina@arm.com>
+
+       * tree-vectorizer.h (SLP_TREE_REF_COUNT): New.
+       * tree-vect-slp.c (_slp_tree::_slp_tree, _slp_tree::~_slp_tree,
+       vect_free_slp_tree, vect_build_slp_tree, vect_print_slp_tree,
+       slp_copy_subtree, vect_attempt_slp_rearrange_stmts): Use it.
+
+2020-09-30  Tobias Burnus  <tobias@codesourcery.com>
+
+       * omp-offload.c (omp_discover_implicit_declare_target): Also
+       handled nested functions.
+
+2020-09-30  Tobias Burnus  <tobias@codesourcery.com>
+           Tom de Vries  <tdevries@suse.de>
+
+       * builtins.c (expand_builtin_cexpi, fold_builtin_sincos): Update
+       targetm.libc_has_function call.
+       * builtins.def (DEF_C94_BUILTIN, DEF_C99_BUILTIN, DEF_C11_BUILTIN):
+       (DEF_C2X_BUILTIN, DEF_C99_COMPL_BUILTIN, DEF_C99_C90RES_BUILTIN):
+       Same.
+       * config/darwin-protos.h (darwin_libc_has_function): Update prototype.
+       * config/darwin.c (darwin_libc_has_function): Add arg.
+       * config/linux-protos.h (linux_libc_has_function): Update prototype.
+       * config/linux.c (linux_libc_has_function): Add arg.
+       * config/i386/i386.c (ix86_libc_has_function): Update
+       targetm.libc_has_function call.
+       * config/nvptx/nvptx.c (nvptx_libc_has_function): New function.
+       (TARGET_LIBC_HAS_FUNCTION): Redefine to nvptx_libc_has_function.
+       * convert.c (convert_to_integer_1): Update targetm.libc_has_function
+       call.
+       * match.pd: Same.
+       * target.def (libc_has_function): Add arg.
+       * doc/tm.texi: Regenerate.
+       * targhooks.c (default_libc_has_function, gnu_libc_has_function)
+       (no_c99_libc_has_function): Add arg.
+       * targhooks.h (default_libc_has_function, no_c99_libc_has_function)
+       (gnu_libc_has_function): Update prototype.
+       * tree-ssa-math-opts.c (pass_cse_sincos::execute): Update
+       targetm.libc_has_function call.
+
+2020-09-30  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/97184
+       * config/i386/i386.md (UNSPECV_MOVDIRI): Renamed to ...
+       (UNSPEC_MOVDIRI): This.
+       (UNSPECV_MOVDIR64B): Renamed to ...
+       (UNSPEC_MOVDIR64B): This.
+       (movdiri<mode>): Use SET operation.
+       (@movdir64b_<mode>): Likewise.
+
+2020-09-30  Florian Weimer  <fweimer@redhat.com>
+
+       * config/i386/i386-c.c (ix86_target_macros_internal): Define
+       __LAHF_SAHF__ and __MOVBE__ based on ISA flags.
+
+2020-09-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/97150
+       * config/aarch64/arm_neon.h (vqrshlb_u8): Make second argument
+       signed.
+       (vqrshlh_u16): Likewise.
+       (vqrshls_u32): Likewise.
+       (vqrshld_u64): Likewise.
+       (vqshlb_u8): Likewise.
+       (vqshlh_u16): Likewise.
+       (vqshls_u32): Likewise.
+       (vqshld_u64): Likewise.
+       (vshld_u64): Likewise.
+
+2020-09-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/96313
+       * config/aarch64/aarch64-simd-builtins.def (sqmovun): Use UNOPUS
+       qualifiers.
+       * config/aarch64/arm_neon.h (vqmovun_s16): Adjust builtin call.
+       Remove unnecessary result cast.
+       (vqmovun_s32): Likewise.
+       (vqmovun_s64): Likewise.
+       (vqmovunh_s16): Likewise.  Fix return type.
+       (vqmovuns_s32): Likewise.
+       (vqmovund_s64): Likewise.
+
+2020-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/aarch64/aarch64.c (aarch64_split_128bit_move_p): Add a
+       function comment.  Tighten check for FP moves.
+       * config/aarch64/aarch64.md (*movti_aarch64): Add a w<-Z alternative.
+       (*movtf_aarch64): Handle r<-Y like r<-r.  Remove unnecessary
+       earlyclobber.  Change splitter predicate from aarch64_reg_or_imm
+       to nonmemory_operand.
+
+2020-09-30  Alex Coplan  <alex.coplan@arm.com>
+
+       PR target/97251
+       * config/arm/arm.md (movsf): Relax TARGET_HARD_FLOAT to
+       TARGET_VFP_BASE.
+       (movdf): Likewise.
+       * config/arm/vfp.md (no_literal_pool_df_immediate): Likewise.
+       (no_literal_pool_sf_immediate): Likewise.
+
+2020-09-30  Alan Modra  <amodra@gmail.com>
+
+       * configure.ac (--with-long-double-format): Typo fix.
+       * configure: Regenerate.
+
+2020-09-30  Alan Modra  <amodra@gmail.com>
+
+       * config/rs6000/rs6000.md (@tablejump<mode>_normal): Don't use
+       non-existent operands[].
+       (@tablejump<mode>_nospec): Likewise.
+
 2020-09-30  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/rs6000.md (tablejump): Simplify.
index f1815d15e81ed71ea47f7920510f4024318d948e..c5ffab1955934891b98d3cae3edf935d0086c4af 100644 (file)
@@ -1 +1 @@
-20200930
+20201001
index 03ce9ea90d45a7ddf37d7ab264b0fcbb75885180..1e36632afd0a6129bd20fc3eef6699d37d3fde45 100644 (file)
@@ -1,3 +1,9 @@
+2020-09-30  Martin Sebor  <msebor@redhat.com>
+
+       PR middle-end/97189
+       * c-attribs.c (append_access_attr): Use the function declaration
+       location for a warning about an attribute access argument.
+
 2020-09-29  Marek Polacek  <polacek@redhat.com>
 
        PR c++/94695
index 4dea15f2742805ebb5ef9ad4d1f945a33c934fa5..eeb6f8a67e01c027f89c7255e67e975cd22a04aa 100644 (file)
@@ -1,3 +1,16 @@
+2020-09-30  Nathan Sidwell  <nathan@acm.org>
+
+       * cp-tree.h (struct lang_decl_fn): Remove hidden_friend_p.
+       (DECL_HIDDEN_FRIEND_P): Delete.
+       * call.c (add_function_candidate): Drop assert about anticipated
+       decl.
+       (build_new_op_1): Drop koenig lookup flagging for hidden friend.
+       * decl.c (duplicate_decls): Drop HIDDEN_FRIEND_P updating.
+       * name-lookup.c (do_pushdecl): Likewise.
+       (set_decl_namespace): Discover hiddenness from OVL_HIDDEN_P.
+       * pt.c (check_explicit_specialization): Record found_hidden
+       explicitly.
+
 2020-09-29  Marek Polacek  <polacek@redhat.com>
 
        PR c++/94695
index faa78970ad7e73395fdd78b5e66de96c83aaf38d..fc65592973c398c1d5705976dbae5a61f9916c64 100644 (file)
@@ -1,3 +1,40 @@
+2020-09-30  Jan Hubicka  <jh@suse.cz>
+
+       * trans-decl.c (gfc_build_intrinsic_function_decls): Add traling dots
+       to spec strings so they match the number of parameters; do not use
+       R and W for non-pointer parameters. Drop pointless specifier on
+       caf_stop_numeric and caf_get_team.
+
+2020-09-30  Jan Hubicka  <hubicka@ucw.cz>
+
+       * trans-io.c (gfc_build_io_library_fndecls): Add trailing dots so
+       length of spec string matches number of arguments.
+
+2020-09-30  Tobias Burnus  <tobias@codesourcery.com>
+
+       PR fortran/97242
+       * expr.c (gfc_is_not_contiguous): Fix check.
+       (gfc_check_pointer_assign): Use it.
+
+2020-09-30  Paul Thomas  <pault@gcc.gnu.org>
+
+       PR fortran/97045
+       * trans-array.c (gfc_conv_array_ref): Make sure that the class
+       decl is passed to build_array_ref in the case of unlimited
+       polymorphic entities.
+       * trans-expr.c (gfc_conv_derived_to_class): Ensure that array
+       refs do not preceed the _len component. Free the _len expr.
+       * trans-stmt.c (trans_associate_var): Reset 'need_len_assign'
+       for polymorphic scalars.
+       * trans.c (gfc_build_array_ref): When the vptr size is used for
+       span, multiply by the _len field of unlimited polymorphic
+       entities, when non-zero.
+
+2020-09-30  Tom de Vries  <tdevries@suse.de>
+
+       * f95-lang.c (gfc_init_builtin_functions):  Update
+       targetm.libc_has_function call.
+
 2020-09-28  Mark Eggleston  <markeggleston@gcc.gnu.org>
 
        Revert:
index 1c265894c8404eaeef5c12f190294a16f6ec3637..72508ab36cbcbe03e6d74ed07da4f8cc7e4821dc 100644 (file)
@@ -1,3 +1,178 @@
+2020-09-30  Martin Sebor  <msebor@redhat.com>
+
+       PR middle-end/97189
+       * gcc.dg/attr-access-2.c: Adjust caret location.
+       * gcc.dg/Wvla-parameter-6.c: New test.
+       * gcc.dg/Wvla-parameter-7.c: New test.
+
+2020-09-30  Martin Sebor  <msebor@redhat.com>
+
+       PR c/97206
+       * gcc.dg/Warray-parameter-7.c: New test.
+       * gcc.dg/Warray-parameter-8.c: New test.
+       * gcc.dg/Wvla-parameter-5.c: New test.
+
+2020-09-30  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/96827
+       * gcc.target/i386/pr96827.c: New test.
+
+2020-09-30  Christophe Lyon  <christophe.lyon@linaro.org>
+
+       PR target/94595
+       * gcc.target/arm/thumb2-cond-cmp-1.c: Skip if arm_cortex_m.
+       * gcc.target/arm/thumb2-cond-cmp-2.c: Skip if arm_cortex_m.
+       * gcc.target/arm/thumb2-cond-cmp-3.c: Skip if arm_cortex_m.
+       * gcc.target/arm/thumb2-cond-cmp-4.c: Skip if arm_cortex_m.
+
+2020-09-30  Richard Biener  <rguenther@suse.de>
+
+       * gcc.dg/vect/pr37027.c: Amend.
+       * gcc.dg/vect/pr67790.c: Likewise.
+       * gcc.dg/vect/pr92324-4.c: Likewise.
+       * gcc.dg/vect/pr92558.c: Likewise.
+       * gcc.dg/vect/pr95495.c: Likewise.
+       * gcc.dg/vect/slp-reduc-1.c: Likewise.
+       * gcc.dg/vect/slp-reduc-2.c: Likewise.
+       * gcc.dg/vect/slp-reduc-3.c: Likewise.
+       * gcc.dg/vect/slp-reduc-4.c: Likewise.
+       * gcc.dg/vect/slp-reduc-5.c: Likewise.
+       * gcc.dg/vect/slp-reduc-7.c: Likewise.
+       * gcc.dg/vect/vect-reduc-in-order-4.c: Likewise.
+
+2020-09-30  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
+
+       PR target/96795
+       * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: New Test.
+       * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Likewise.
+       * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Likewise.
+
+2020-09-30  Joel Hutton  <joel.hutton@arm.com>
+
+       PR target/96837
+       * gcc.dg/vect/bb-slp-49.c: New test.
+
+2020-09-30  Tobias Burnus  <tobias@codesourcery.com>
+
+       PR fortran/97242
+       * gfortran.dg/contiguous_11.f90: New test.
+       * gfortran.dg/contiguous_4.f90: Update.
+       * gfortran.dg/contiguous_7.f90: Update.
+
+2020-09-30  Paul Thomas  <pault@gcc.gnu.org>
+
+       PR fortran/97045
+       * gfortran.dg/select_type_50.f90 : New test.
+
+2020-09-30  H.J. Lu  <hjl.tools@gmail.com>
+
+       PR target/97184
+       * gcc.target/i386/movdir64b.c: New test.
+       * gcc.target/i386/movdiri32.c: Likewise.
+       * gcc.target/i386/movdiri64.c: Likewise.
+       * lib/target-supports.exp (check_effective_target_movdir): New.
+
+2020-09-30  Tom de Vries  <tdevries@suse.de>
+
+       * gcc.dg/pr94600-1.c: Use effective target
+       (non_strict_align || pcc_bitfield_type_matters).
+       * gcc.dg/pr94600-3.c: Same.
+
+2020-09-30  Jakub Jelinek  <jakub@redhat.com>
+
+       * gcc.target/i386/amxint8-dpbssd-2.c: Require effective targets
+       amx_tile and amx_int8.
+       * gcc.target/i386/amxint8-dpbsud-2.c: Likewise.
+       * gcc.target/i386/amxint8-dpbusd-2.c: Likewise.
+       * gcc.target/i386/amxint8-dpbuud-2.c: Likewise.
+       * gcc.target/i386/amxbf16-dpbf16ps-2.c: Require effective targets
+       amx_tile and amx_bf16.
+       * gcc.target/i386/amxtile-2.c: Require effective target amx_tile.
+
+2020-09-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/97150
+       * gcc.target/aarch64/pr97150.c: New test.
+
+2020-09-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/96313
+       * gcc.target/aarch64/pr96313.c: New test.
+       * gcc.target/aarch64/scalar_intrinsics.c (test_vqmovunh_s16):
+       Adjust return type.
+       (test_vqmovuns_s32): Likewise.
+       (test_vqmovund_s64): Likewise.
+
+2020-09-30  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * gcc.target/aarch64/movtf_1.c: New test.
+       * gcc.target/aarch64/movti_1.c: Likewise.
+
 2020-09-29  Martin Sebor  <msebor@redhat.com>
 
        PR middle-end/97188
index ce0d06895d49454604885dce0fb420e7ba54e98d..d6af0a2e800933a7e93fce90f071f63ae324e9c0 100644 (file)
@@ -1,3 +1,12 @@
+2020-09-30  Andrew Stubbs  <ams@codesourcery.com>
+
+       * parallel.c (gomp_resolve_num_threads): Ignore nest_var on nvptx
+       and amdgcn targets.
+
+2020-09-30  Tobias Burnus  <tobias@codesourcery.com>
+
+       * testsuite/libgomp.fortran/declare-target-3.f90: New test.
+
 2020-09-29  Andrew Stubbs  <ams@codesourcery.com>
 
        * config/gcn/bar.c (gomp_barrier_wait_end): Skip the barrier if the
index e6e394fa6b38da11764fa2988911a97e935dbfc6..8512437086ed1305ba5b6166163b2d97a30897d4 100644 (file)
@@ -1,3 +1,16 @@
+2020-09-30  Jonathan Wakely  <jwakely@redhat.com>
+
+       * config/cpu/arm/cxxabi_tweaks.h (_GLIBCXX_GUARD_TEST_AND_ACQUIRE):
+       (_GLIBCXX_GUARD_SET_AND_RELEASE): Define for EABI.
+
+2020-09-30  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/c++config (_GLIBCXX_HAVE_BUILTIN_IS_SAME):
+       Define for GCC 11 or when !__is_identifier(__is_same).
+       (_GLIBCXX_BUILTIN_IS_SAME_AS): Remove.
+       * include/std/type_traits (is_same, is_same_v): Replace uses
+       of _GLIBCXX_BUILTIN_IS_SAME_AS.
+
 2020-09-28  Patrick Palka  <ppalka@redhat.com>
 
        * include/std/ranges (filter_view): Declare the data member