cpu/serv: switch to pythondata package instead of local git clone.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 28 Apr 2020 08:32:13 +0000 (10:32 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 28 Apr 2020 08:34:39 +0000 (10:34 +0200)
litex/soc/cores/cpu/serv/core.py
litex_setup.py

index 92d49a6fc56d769b23fc4fd6a3a66cd60363084a..d99661d66e3c5a08ac14229003acace54aec3b3c 100644 (file)
@@ -6,6 +6,7 @@ import os
 
 from migen import *
 
+from litex import get_data_mod
 from litex.soc.interconnect import wishbone
 from litex.soc.cores.cpu import CPU
 
@@ -80,11 +81,9 @@ class SERV(CPU):
 
     @staticmethod
     def add_sources(platform):
-        # FIXME: add SERV as submodule
-        os.system("git clone https://github.com/olofk/serv")
-        vdir = os.path.join("serv", "rtl")
-        platform.add_source_dir(vdir)
-        platform.add_verilog_include_path(vdir)
+        vdir = get_data_mod("cpu", "serv").data_location
+        platform.add_source_dir(os.path.join(vdir, "rtl"))
+        platform.add_verilog_include_path(os.path.join(vdir, "rtl"))
 
     def do_finalize(self):
         assert hasattr(self, "reset_address")
index 52c2635ed0f8019c46808788d0cd19c44814d5a9..f2502abc0a12d4de8c7466072330ab11452f1de8 100755 (executable)
@@ -42,6 +42,7 @@ repos = [
     ("pythondata-cpu-lm32",        ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-mor1kx",      ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-picorv32",    ("https://github.com/litex-hub/", False, True)),
+    ("pythondata-cpu-serv",        ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-vexriscv",    ("https://github.com/litex-hub/", False, True)),
     ("pythondata-cpu-rocket",      ("https://github.com/litex-hub/", False, True)),
 ]