remove switches from hyperram iverilog test
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 21:49:14 +0000 (21:49 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 26 Mar 2022 21:49:14 +0000 (21:49 +0000)
src/simsoc_hyperram_tb.v

index aef419249db3313965bf3c61e7a0f0aa70ec363c..fcb2c25ab0bc3bdc1fdb5f94267d3897dece7588 100644 (file)
@@ -65,14 +65,14 @@ s27kl0641
   wire led_5;
   wire led_6;
   wire led_7;
-  reg switch_0 = 0;
-  reg switch_1 = 0;
-  reg switch_2 = 0;
-  reg switch_3 = 0;
-  reg switch_4 = 0;
-  reg switch_5 = 0;
-  reg switch_6 = 0;
-  reg switch_7 = 0;
+  //reg switch_0 = 0;
+  //reg switch_1 = 0;
+  //reg switch_2 = 0;
+  //reg switch_3 = 0;
+  //reg switch_4 = 0;
+  //reg switch_5 = 0;
+  //reg switch_6 = 0;
+  //reg switch_7 = 0;
 
   top simsoctop (
     // hyperram
@@ -94,14 +94,14 @@ s27kl0641
     .led_6__io(led_6),
     .led_7__io(led_7),
     // switches
-    .switch_0__io(switch_0),
-    .switch_1__io(switch_1),
-    .switch_2__io(switch_2),
-    .switch_3__io(switch_3),
-    .switch_4__io(switch_4),
-    .switch_5__io(switch_5),
-    .switch_6__io(switch_6),
-    .switch_7__io(switch_7),
+    //.switch_0__io(switch_0),
+    //.switch_1__io(switch_1),
+    //.switch_2__io(switch_2),
+    //.switch_3__io(switch_3),
+    //.switch_4__io(switch_4),
+    //.switch_5__io(switch_5),
+    //.switch_6__io(switch_6),
+    //.switch_7__io(switch_7),
     // clock/reset
     .clk100_0__p(clkin),
     .rst_0__io(1'b0)