Merge branch 'master' of ssh://libre-riscv.org:922/ieee754fpu

diff --git a/src/add/nmigen_add_experiment.py b/src/add/nmigen_add_experiment.py
index fa3c08177fb8b3bba6dc3386bdb57c639cd6f14c..4ee76bb99c59d63c4011291ff22396eaf5443c91 100644 (file)
--- a/src/add/nmigen_add_experiment.py
+++ b/src/add/nmigen_add_experiment.py
@@ -238,6 +238,20 @@ class FPADD:
                         round_bit.eq(tot[1]),
                         sticky.eq(tot[0])
                 ]
+
+            with m.State("normalise_2"):
+                with m.If(z_e < -126):
+                    m.d.sync +=[
+                        z_e.eq(z_e + 1),
+                        z_m.eq(z_m >> 1),
+                        guard.eq(z_m[0]),
+                        round_bit.eq(guard),
+                        sticky.eq(sticky | round_bit)
+                ]
+
+                with m.Else():
+                    m.next = "round"
+
         return m
 
 """