testsuite: powerpc fold-vec and sse updates.

Recent code generation changes have affected the count of some instructions.
This patch updates the instruction count for fold-vec-extract on P7 and P8.

Also, some of SSE emulation intrinsics only work on LE systems.

gcc/testsuite/ChangeLog:

	* gcc.target/powerpc/fold-vec-extract-char.p7.c: Adjust addi count.
	* gcc.target/powerpc/fold-vec-extract-double.p7.c: Same.
	* gcc.target/powerpc/fold-vec-extract-float.p7.c: Same.
	* gcc.target/powerpc/fold-vec-extract-float.p8.c: Same.
	* gcc.target/powerpc/fold-vec-extract-int.p7.c: Same.
	* gcc.target/powerpc/fold-vec-extract-int.p8.c: Same.
	* gcc.target/powerpc/fold-vec-extract-short.p7.c: Same.
	* gcc.target/powerpc/fold-vec-extract-short.p8.c: Same.
	* gcc.target/powerpc/sse-andnps-1.c: Restrict to LE.
	* gcc.target/powerpc/sse-movhps-1.c: Restrict to LE.
	* gcc.target/powerpc/sse-movlps-1.c: Restrict to LE.
	* gcc.target/powerpc/sse2-andnpd-1.c: Restrict to LE.

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
index 42599c214e4302a21e0ef4c57b050a521ffabbcd..29a8aa84db2825898945f4545ee0ba60e6d22de8 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c
@@ -11,7 +11,7 @@
 /* one extsb (extend sign-bit) instruction generated for each test against
    unsigned types */
 
-/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
 /* -m32 target uses rlwinm in place of rldicl. */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index cbf6cffbeba17dfe4de65cef9c5294d3992c2cc4..3cae644b90b71feb250a96481a2fe389db193a7f 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -13,7 +13,8 @@
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 target has an 'add' in place of one of the 'addi'. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
 /* -m32 target has a rlwinm in place of a rldic .  */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index c9abb6c1f352c26a988792debfd5e6a2bc402d6e..59a4979457dcb62da969fbef26fb7aec291fb714 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -12,7 +12,8 @@
 /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */
 /* { dg-final { scan-assembler-times {\mli\M} 1 } } */
 /* -m32 as an add in place of an addi. */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */
 /* -m32 uses rlwinm in place of rldic */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index 68eeeede4b3075dd6d6d333856e279bed64db8a9..4b1d75ee26d0f6eaaeb7d0c53f96c1a5ec40224e 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -26,7 +26,7 @@
 /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */
 
 
 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 418762e3948a5805e96505da50b6fd1022aaa8e3..3729a1646e9c9d62f28641fe988bf086cfdd1e98 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
@@ -10,7 +10,8 @@
 // P7 variables:  li, addi, stxvw4x, lwa/lwz
 
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
index d1e3b62373f801286ee78f07c4925d458eaa761f..75eaf25943b70b30cd15c17a32c09606079fde4a 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
@@ -30,7 +30,7 @@
 /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
 
 
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
index 46e943faa6a41d9491df36d7705a32ab10a44677..a495d9f3928faacbe4937f71d2b8d5bc1ce1b984 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
@@ -10,7 +10,8 @@
 // P7 (be) constants:            li, addi,              stxvw4x, lha/lhz
 
 /* { dg-final { scan-assembler-times {\mli\M} 6 } } */
-/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
 /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */
 /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
index 00685aca1367b5dcdd2a98116ad5c86d1622c8c1..0ddecb4e4b55d9799ef5890f44af6d818347c29b 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
@@ -32,7 +32,7 @@
 /* add and rlwinm instructions only on the variable tests. */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */
 
 

diff --git a/gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c b/gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c
index 7b0dc0158578462db3283b17ba2d4ca4f4af369c..3b45ca43496fe5fdf950d2836538f195bfdf2416 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/sse-andnps-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target le } } */
 /* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
 /* { dg-require-effective-target p8vector_hw } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c b/gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c
index f94c5aafa316067973bc3fe459c58eb172336b3d..a0666e51fd345ec2642fea7207974f432c543bec 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/sse-movhps-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target le } } */
 /* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
 /* { dg-require-effective-target p8vector_hw } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c b/gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c
index 3d1b79a4f39b7453c8150e3b6010b5d7fce9f7fa..281d49c75a6426f24a064f278c7797ee339f33f4 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/sse-movlps-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target le } } */
 /* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
 /* { dg-require-effective-target p8vector_hw } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/sse2-andnpd-1.c b/gcc/testsuite/gcc.target/powerpc/sse2-andnpd-1.c
index 212bc00826a3fb15e4ccda7c0c71fd1e89fa9028..1a0e6cb11d4c4b225e60cff7d31d35d7cb64d551 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/sse2-andnpd-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/sse2-andnpd-1.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target le } } */
 /* { dg-options "-O3 -mpower8-vector -Wno-psabi" } */
 /* { dg-require-effective-target p8vector_hw } */