arty: Add other RGB LEDs, attach to gpio 0-8

Signed-off-by: Matt Johnston <matt@codeconstruct.com.au>

diff --git a/fpga/arty_a7.xdc b/fpga/arty_a7.xdc
index 5211d59ae87bbdafa029c03d0ce7f8a56b78fd90..2a011617129706e8521f2e9e38aee2866ce1d469 100644 (file)
--- a/fpga/arty_a7.xdc
+++ b/fpga/arty_a7.xdc
@@ -13,18 +13,18 @@ set_property -dict { PACKAGE_PIN A9  IOSTANDARD LVCMOS33 } [get_ports { uart_mai
 # RGB LEDs
 ################################################################################
 
-set_property -dict { PACKAGE_PIN E1  IOSTANDARD LVCMOS33 } [get_ports { led0_b }];
-set_property -dict { PACKAGE_PIN F6  IOSTANDARD LVCMOS33 } [get_ports { led0_g }];
-set_property -dict { PACKAGE_PIN G6  IOSTANDARD LVCMOS33 } [get_ports { led0_r }];
-#set_property -dict { PACKAGE_PIN G4  IOSTANDARD LVCMOS33 } [get_ports { led1_b }];
-#set_property -dict { PACKAGE_PIN J4  IOSTANDARD LVCMOS33 } [get_ports { led1_g }];
-#set_property -dict { PACKAGE_PIN G3  IOSTANDARD LVCMOS33 } [get_ports { led1_r }];
-#set_property -dict { PACKAGE_PIN H4  IOSTANDARD LVCMOS33 } [get_ports { led2_b }];
-#set_property -dict { PACKAGE_PIN J2  IOSTANDARD LVCMOS33 } [get_ports { led2_g }];
-#set_property -dict { PACKAGE_PIN J3  IOSTANDARD LVCMOS33 } [get_ports { led2_r }];
-#set_property -dict { PACKAGE_PIN K2  IOSTANDARD LVCMOS33 } [get_ports { led3_b }];
-#set_property -dict { PACKAGE_PIN H6  IOSTANDARD LVCMOS33 } [get_ports { led3_g }];
-#set_property -dict { PACKAGE_PIN K1  IOSTANDARD LVCMOS33 } [get_ports { led3_r }];
+set_property -dict { PACKAGE_PIN E1  IOSTANDARD LVCMOS33 } [get_ports { led_b[0] }];
+set_property -dict { PACKAGE_PIN F6  IOSTANDARD LVCMOS33 } [get_ports { led_g[0] }];
+set_property -dict { PACKAGE_PIN G6  IOSTANDARD LVCMOS33 } [get_ports { led_r[0] }];
+set_property -dict { PACKAGE_PIN G4  IOSTANDARD LVCMOS33 } [get_ports { led_b[1] }];
+set_property -dict { PACKAGE_PIN J4  IOSTANDARD LVCMOS33 } [get_ports { led_g[1] }];
+set_property -dict { PACKAGE_PIN G3  IOSTANDARD LVCMOS33 } [get_ports { led_r[1] }];
+set_property -dict { PACKAGE_PIN H4  IOSTANDARD LVCMOS33 } [get_ports { led_b[2] }];
+set_property -dict { PACKAGE_PIN J2  IOSTANDARD LVCMOS33 } [get_ports { led_g[2] }];
+set_property -dict { PACKAGE_PIN J3  IOSTANDARD LVCMOS33 } [get_ports { led_r[2] }];
+set_property -dict { PACKAGE_PIN K2  IOSTANDARD LVCMOS33 } [get_ports { led_b[3] }];
+set_property -dict { PACKAGE_PIN H6  IOSTANDARD LVCMOS33 } [get_ports { led_g[3] }];
+set_property -dict { PACKAGE_PIN K1  IOSTANDARD LVCMOS33 } [get_ports { led_r[3] }];
 
 ################################################################################
 # Normal LEDs

diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl
index ecdd5d42281dfd401ec94b87f8ddc6ded6ca90cf..349cda344e984d160b6eab01670c30b9a8462bb0 100644 (file)
--- a/fpga/top-arty.vhdl
+++ b/fpga/top-arty.vhdl
@@ -40,9 +40,9 @@ entity toplevel is
         uart_main_rx : in  std_ulogic;
 
         -- LEDs
-        led0_b  : out std_ulogic;
-        led0_g  : out std_ulogic;
-        led0_r  : out std_ulogic;
+        led_b   : out std_ulogic_vector(3 downto 0);
+        led_g   : out std_ulogic_vector(3 downto 0);
+        led_r   : out std_ulogic_vector(3 downto 0);
         led4    : out std_ulogic;
         led5    : out std_ulogic;
         led6    : out std_ulogic;
@@ -143,9 +143,9 @@ architecture behaviour of toplevel is
     signal core_alt_reset : std_ulogic;
 
     -- Status LED
-    signal led0_b_pwm : std_ulogic;
-    signal led0_r_pwm : std_ulogic;
-    signal led0_g_pwm : std_ulogic;
+    signal led_b_pwm : std_ulogic_vector(3 downto 0);
+    signal led_r_pwm : std_ulogic_vector(3 downto 0);
+    signal led_g_pwm : std_ulogic_vector(3 downto 0);
 
     -- Dumb PWM for the LEDs, those RGB LEDs are too bright otherwise
     signal pwm_counter  : std_ulogic_vector(8 downto 0);
@@ -330,9 +330,9 @@ begin
                 pll_locked_out => system_clk_locked
                 );
 
-        led0_b_pwm <= '1';
-        led0_r_pwm <= '1';
-        led0_g_pwm <= '0';
+        led_b_pwm <= "1111";
+        led_r_pwm <= "1111";
+        led_g_pwm <= "0000";
         core_alt_reset <= '0';
 
         -- Vivado barfs on those differential signals if left
@@ -432,9 +432,9 @@ begin
                 ddram_reset_n   => ddram_reset_n
                 );
 
-        led0_b_pwm <= not dram_init_done;
-        led0_r_pwm <= dram_init_error;
-        led0_g_pwm <= dram_init_done and not dram_init_error;
+        led_b_pwm(0) <= not dram_init_done;
+        led_r_pwm(0) <= dram_init_error;
+        led_g_pwm(0) <= dram_init_done and not dram_init_error;
 
     end generate;
 
@@ -683,13 +683,13 @@ begin
         if rising_edge(system_clk) then
             pwm_counter <= std_ulogic_vector(signed(pwm_counter) + 1);
             if pwm_counter(8 downto 4) = "00000" then
-                led0_b <= led0_b_pwm;
-                led0_r <= led0_r_pwm;
-                led0_g <= led0_g_pwm;
+                led_b <= led_b_pwm;
+                led_r <= led_r_pwm;
+                led_g <= led_g_pwm;
             else
-                led0_b <= '0';
-                led0_r <= '0';
-                led0_g <= '0';
+                led_b <= "0000";
+                led_r <= "0000";
+                led_g <= "0000";
             end if;
         end if;
     end process;
@@ -732,15 +732,27 @@ begin
     gpio_in(30) <= shield_io(43);
     gpio_in(31) <= shield_io(44);
 
-    shield_io(0) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z';
-    shield_io(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z';
-    shield_io(2) <= gpio_out(2) when gpio_dir(2) = '1' else 'Z';
-    shield_io(3) <= gpio_out(3) when gpio_dir(3) = '1' else 'Z';
-    shield_io(4) <= gpio_out(4) when gpio_dir(4) = '1' else 'Z';
-    shield_io(5) <= gpio_out(5) when gpio_dir(5) = '1' else 'Z';
-    shield_io(6) <= gpio_out(6) when gpio_dir(6) = '1' else 'Z';
-    shield_io(7) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z';
-    shield_io(8) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z';
+    led_b_pwm(1) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z';
+    led_g_pwm(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z';
+    led_r_pwm(1) <= gpio_out(2) when gpio_dir(2) = '1' else 'Z';
+
+    led_b_pwm(2) <= gpio_out(3) when gpio_dir(3) = '1' else 'Z';
+    led_g_pwm(2) <= gpio_out(4) when gpio_dir(4) = '1' else 'Z';
+    led_r_pwm(2) <= gpio_out(5) when gpio_dir(5) = '1' else 'Z';
+
+    led_b_pwm(3) <= gpio_out(6) when gpio_dir(6) = '1' else 'Z';
+    led_g_pwm(3) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z';
+    led_r_pwm(3) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z';
+
+    --shield_io(0) <= gpio_out(0) when gpio_dir(0) = '1' else 'Z';
+    --shield_io(1) <= gpio_out(1) when gpio_dir(1) = '1' else 'Z';
+    --shield_io(2) <= gpio_out(2) when gpio_dir(2) = '1' else 'Z';
+    --shield_io(3) <= gpio_out(3) when gpio_dir(3) = '1' else 'Z';
+    --shield_io(4) <= gpio_out(4) when gpio_dir(4) = '1' else 'Z';
+    --shield_io(5) <= gpio_out(5) when gpio_dir(5) = '1' else 'Z';
+    --shield_io(6) <= gpio_out(6) when gpio_dir(6) = '1' else 'Z';
+    --shield_io(7) <= gpio_out(7) when gpio_dir(7) = '1' else 'Z';
+    --shield_io(8) <= gpio_out(8) when gpio_dir(8) = '1' else 'Z';
     shield_io(9) <= gpio_out(9) when gpio_dir(9) = '1' else 'Z';
     shield_io(10) <= gpio_out(10) when gpio_dir(10) = '1' else 'Z';
     shield_io(11) <= gpio_out(11) when gpio_dir(11) = '1' else 'Z';