rs6000.md (signbit<mode>2_dm): Make this a parameterized name.

@signbit<mode>2_dm

	* config/rs6000/rs6000.md (signbit<mode>2_dm): Make this a
	parameterized name.
	(signbit<mode>2): Use that name.  Simplify.

From-SVN: r272912

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dad3442b9497429947716d1089263e4ded2f20da..00885e67a5515569b0d7aa2b41506dc0f638e0b5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/rs6000.md (signbit<mode>2_dm): Make this a
+       parameterized name.
+       (signbit<mode>2): Use that name.  Simplify.
+
 2019-07-01  Joern Rennecke  <joern.rennecke@riscy-ip.com>
 
        PR middle-end/66726

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 9ab9ceb87f53b2545a74252b7002713f61452ef8..9e81df9e53728adad42cb19c0e666f4e4f4d6269 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -4857,13 +4857,7 @@
       rtx tmp = gen_reg_rtx (DImode);
       rtx dest_di = gen_lowpart (DImode, dest);
 
-      if (<MODE>mode == KFmode)
-       emit_insn (gen_signbitkf2_dm (tmp, src));
-      else if (<MODE>mode == TFmode)
-       emit_insn (gen_signbittf2_dm (tmp, src));
-      else
-       gcc_unreachable ();
-
+      emit_insn (gen_signbit2_dm (<MODE>mode, tmp, src));
       emit_insn (gen_lshrdi3 (dest_di, tmp, GEN_INT (63)));
       DONE;
     }
@@ -4893,7 +4887,7 @@
 ;; After register allocation, if the _Float128 had originally been in GPRs, the
 ;; split allows the post reload phases to eliminate the move, and do the shift
 ;; directly with the register that contains the signbit.
-(define_insn_and_split "signbit<mode>2_dm"
+(define_insn_and_split "@signbit<mode>2_dm"
   [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
        (unspec:DI [(match_operand:SIGNBIT 1 "gpc_reg_operand" "wa,r")]
                   UNSPEC_SIGNBIT))]